Job Title
Staff Hardware Design Engineer
Role Summary
Design and deliver complete on-chip network systems and hardware blocks. The role leads architecture specification, verification strategy, and collaborates with hardware, software, and application engineering teams to ensure product cohesion, quality, and on-time delivery.
Experience Level
Senior — typically requires at least 10 years of relevant SoC/IP/NoC design experience.
Responsibilities
Core responsibilities include:
- Write architecture specifications for configurable on-chip networks and ensure coverage in design verification.
- Design, validate, and ensure quality of hardware blocks.
- Contribute to verification methodology and maintain regression environments.
- Collaborate with hardware and software teams to ensure cohesive product integration.
- Maintain and improve existing IP in collaboration with application engineering.
- Provide technical support and mentorship to colleagues.
Requirements
Must-have skills and experience:
- Minimum ~10 years experience in SoC/IP/NoC design.
- Experience with coherent and non-coherent communication protocols and control models (e.g., AMBA, PCIe, CXL, OCP) and familiarity with CPU architectures (ARM, RISC-V).
- Strong experience across SoC/IP design flow: specification, architecture, RTL coding, verification, DFT, synthesis, power and timing closure.
- Proficiency in HDLs and verification languages (SystemC, Verilog/VHDL/SystemVerilog) and backend EDA tools (Cadence, Synopsys, Mentor).
- Programming and scripting skills (C++, Python, other scripting languages).
- Excellent problem solving, communication, and teamwork skills; fluent English.
Education Requirements
Master's degree or Doctorate in engineering or computer science, or equivalent practical experience.
About the Company
Company: ArterisIP
Headquarters: Montigny-le-Bretonneux, France
Provider of configurable on-chip interconnect IP and network-on-chip (NoC) solutions for system-on-chip (SoC) integration, offering interconnect fabrics, IP blocks, verification tools and engineering support to semiconductor and system companies.

Date Posted: 2026-04-30