Staff FPGA Engineer, EW

Job Title

Staff FPGA Engineer, EW

Role Summary

Join the Electronic Warfare (EW) team in Costa Mesa to lead end-to-end FPGA design and verification on AMD/Xilinx SoC/FPGA platforms for software-defined radio and EW systems. The team delivers FPGA-based processing architectures, radios, and PCB assemblies that operate in contested environments.

This role owns FPGA development, defines architecture, implements HDL/DSP modules, and establishes robust FPGA development processes across hardware, firmware, and software teams.

Experience Level

Senior - requires 12+ years of relevant experience.

Responsibilities

Primary responsibilities include architecture, implementation, integration, and verification of FPGA/DSP subsystems for software-defined radios and EW platforms.

• Own FPGA development for software-defined radio platforms that enable EW functions.
• Design and test VHDL DSP modules and related FPGA infrastructure.
• Integrate subsystems into larger FPGA cores and resolve resource and timing contentions.
• Collaborate with software and electrical engineers to bring up state-of-the-art boards.
• Develop drivers for custom RF component boards (PLLs, mixed-signal front ends).
• Establish and improve FPGA design processes and verification flows.
• Manage project deliverables, documentation, and cross-team communication.

Requirements

Must-have qualifications and core competencies.

• 12+ years of experience in FPGA/DSP design and verification.
• Strong experience implementing DSP for embedded devices and/or software-defined radios.
• Experience with Xilinx/AMD SoC/FPGA architectures and development workflows.
• Experience bringing up high-speed digital interfaces (PCIe, JESD, Aurora, N-Gbps optical links).
• Proficient in HDL design using VHDL and/or Verilog.
• Proficiency in a Linux development environment and using Git; experience with CI/CD workflows and TCL automation.
• Eligible to obtain and maintain an active U.S. Secret security clearance.
• Experience mentoring or leading small engineering teams (1–3 engineers).
• Self-starter with strong communication and outcome-driven execution.

Nice-to-have:

• Experience with the latest AMD SoCs and AMD FPGA NOC features (partial reconfiguration, DFX, segmented flow).
• Working knowledge of signal processing flows from data converter to bits.
• Exposure to wireless communications and/or radar systems design.
• Experience with RF test equipment (spectrum analyzer, signal generators, oscilloscopes).
• Knowledge or experience using AMD AIE tiles for processing.

Education Requirements

Not specified.

About the Company

Company: Anduril

Headquarters: Costa Mesa, CA, USA

Anduril is a defense technology company that builds autonomous systems, AI, sensor-fusion, and computer-vision-enabled platforms for U.S. and allied military and intelligence customers, powered by its Lattice OS to accelerate delivery of operational capabilities.