Staff Engineer, Systems Design/Architecture Engineering

Job Title

Staff Engineer, Systems Design/Architecture Engineering

Role Summary

Lead the architecture, development, and maintenance of SystemC/TLM-2.0 virtual platforms and IP models for complex multi-core SoCs. Work across architecture, hardware, software, verification, and product teams to deliver virtual platforms used for software bring-up, validation, and post-silicon debug.

Serve as technical lead for multiple IP and full-system platform models, define modeling strategy and standards, and mentor junior engineers.

Experience Level

Senior. Experience expectations vary by degree: B.E./B.Tech: 8–12 years; M.S./M.Tech: 6–10 years; Ph.D.: 4+ years of relevant industry experience.

Responsibilities

Primary technical and leadership responsibilities for virtual platform and IP model development.

• Architect, implement, and integrate SystemC/TLM-2.0 virtual platforms for multi-core SoCs (processors, interconnects, memory, peripherals, accelerators, custom IP).
• Own IP model lifecycle: specification, implementation, validation, release, and maintenance.
• Define modeling strategy, coding standards, reusable libraries, validation and RTL-correlation methods.
• Deliver virtual platforms early to enable firmware, driver, OS, and application bring-up ahead of RTL/silicon.
• Integrate platforms with tools and ecosystems (QEMU, vendor models, debuggers, CI/CD) and support co-simulation/emulation flows.
• Provide post-silicon validation and debug support, reproduce field/silicon issues on virtual platforms, and perform root-cause analysis.
• Lead and mentor P1–P3 engineers; represent the team in cross-site and customer forums.

Requirements

Must-have technical skills, tooling experience, and professional behaviors.

• Expert-level SystemC, TLM-2.0, C, and modern C++ (C++14/17) with model performance optimization experience.
• Proven track record delivering production-quality full-system SoC virtual platforms.
• Deep experience with ARM and/or RISC-V processor architectures, ISS/CPU model integration, boot flows, and software bring-up (bare-metal, RTOS, Linux).
• Strong understanding of SoC architecture, memory hierarchies, coherency protocols, interconnects, DMA, interrupts, power management, and HW/SW co-design.
• Experience with VP tools/frameworks (e.g., Synopsys Virtualizer, Arm Fast Models, QEMU, GreenSocs/QBox) and RTL co-simulation or hybrid emulation.
• Proficient in Python and build systems (CMake); familiar with Agile/DevOps, Git, Jenkins/GitHub Actions, and code-quality tooling.
• Demonstrated technical leadership, mentoring, cross-functional influence, and strong verbal/written communication skills.
• Willingness to travel (~10%) and to work across geographically dispersed teams.

Education Requirements

Minimum B.E./B.Tech or M.S./M.Tech or Ph.D. in Electrical Engineering, Electronics, Computer Science, or a closely related technical field. Experience ranges indicated by degree: B.E./B.Tech 8–12 years; M.S./M.Tech 6–10 years; Ph.D. 4+ years.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.