Staff Engineer, RTL Design

Job Title

Staff Engineer, RTL Design

Role Summary

Design and deliver RTL for on-chip memory controllers for new memory products. The role owns logic architecture, RTL implementation, synthesis/timing closure, and supports silicon bring-up across device, system, and product teams.

Works within a cross-functional ASIC/SoC team to meet performance, power, area, and manufacturability targets from specification through tape-out.

Experience Level

Senior-level role (Staff). Typical expectation: senior engineer with substantial ASIC/SoC RTL and memory-controller experience; generally 7+ years of relevant industry experience.

Responsibilities

Primary responsibilities include:

• Own logic architecture and RTL design of on-chip memory controllers; drive features from specification through implementation and design closure.
• Meet performance, power, and area targets through microarchitecture and RTL optimizations.
• Develop synthesis and timing constraints, perform STA, and resolve timing issues to achieve closure.
• Perform RTL and gate-level verification, create verification plans, and deliver post-layout simulation results.
• Support netlist bring-up, functional/timing ECOs, and silicon validation activities including reticle experiments and tape-out revisions.
• Create architecture and design specification documents and maintain detailed technical documentation.
• Collaborate with Device, System, Probe, Test, CAD, FAE, and Product Engineering to ensure manufacturability and validate silicon results.
• Define and share best-known design and verification practices; participate in recruiting and new-hire onboarding.

Requirements

Must-have skills and experience:

• Proven RTL design experience in Verilog/SystemVerilog for complex digital blocks, preferably memory controllers.
• Demonstrated experience with synthesis flows, STA, timing closure, and timing constraint development.
• Gate-level and post-layout verification experience and familiarity with simulation-based validation and netlist bring-up.
• Ability to interpret device and system specifications and translate them into RTL and verification plans.
• Experience coordinating with back-end implementation (APR), executing ECOs, and preparing for physical signoff.
• Strong debugging, problem-solving, and cross-team communication skills.

Nice-to-have:

• Prior experience in memory-product design or working on storage/DRAM/NVM controllers.
• Familiarity with physical implementation flows (APR, ECO execution) and silicon bring-up procedures.
• Experience applying automation or AI techniques to code generation, verification, or design flows.

Education Requirements

Not specified.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.