Staff Engineer, Power Delivery

Job Title

Staff Engineer, Power Delivery

Role Summary

Responsible for defining and optimizing on-die power delivery network (PDN) architecture for advanced-node, high-performance SoCs. Collaborate with SoC architecture, physical design, IP, package/PI, and technology teams to deliver PDN solutions that meet performance, power, area, reliability, and routing constraints.

Experience Level

Senior-level. Typical experience expectation: 6+ years of System/Package Design/Technology Engineering or related experience (see Education Requirements for degree-to-experience mapping).

Responsibilities

Lead PDN architecture and integration across architecture, implementation, and signoff phases.

• Own on-chip PDN architecture and power-grid strategy for advanced-node, high-performance SoCs.
• Define and optimize power-grid topology, rail structure, power domains, and power/ground distribution for high-current CPU, NSP, GPU, and other performance-critical IPs.
• Drive PDN-aware floorplanning to balance power delivery with PPA, routing resources, timing, and implementation constraints.
• Define on-die connectivity to package bump interfaces, including bump allocation and die-to-package power-delivery interactions.
• Develop on-die decoupling-capacitance strategies: decap allocation, placement, and effectiveness across PDN frequency ranges.
• Establish static IR-drop, dynamic voltage-droop, impedance, electromigration (EM)/current-density, and reliability budgets for critical power rails.
• Perform and lead static IR, dynamic/transient, impedance, EM, and PDN coupling analyses toward power-integrity closure.
• Co-optimize the power grid with floorplan, timing, PPA, routing, bump allocation, and package connectivity for constrained advanced nodes.
• Define PDN roadmap for advanced technology nodes, including evaluation of backside power delivery and other emerging technologies.
• Develop scalable PDN extraction, modeling, simulation, signoff, and correlation methodologies.

Requirements

Key qualifications and skills required or strongly preferred.

• Must-have: Deep expertise in on-chip power-grid architecture, PDN optimization, and advanced-node power delivery.
• Must-have: Hands-on experience with static IR, dynamic voltage droop, transient/impedance analysis, and electromigration/current-density analysis.
• Must-have: Experience driving PDN-aware floorplanning and co-optimization with physical design, timing, and routing teams.
• Must-have: Strong scripting and automation skills (Python, TCL, or similar) and ability to develop PDN extraction/modeling/signoff flows.
• Must-have: Proven ability to work cross-functionally with SoC architecture, physical design, IP, package/PI, and technology teams.
• Experience note: 6+ years of System/Package Design/Technology Engineering or related experience (see Education Requirements for degree-based experience alternatives).
• Nice-to-have: Experience with Cadence Voltus, Sigrity PowerSI, Ansys HFSS/Q3D/SiWave, HSpice, ADS, or equivalent power-integrity and circuit-simulation tools.
• Nice-to-have: Knowledge of backside power delivery, advanced packaging, and die-to-package power-delivery co-optimization.

Education Requirements

Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or a related field with 6+ years of System/Package Design/Technology Engineering or related work experience; OR Master's degree in those fields with 5+ years of relevant experience; OR PhD in those fields with 4+ years of relevant experience. Preferred: advanced degree (M.S./Ph.D.) in Electrical or Computer Engineering or related fields with focus on power integrity, VLSI, physical design, or semiconductor power delivery.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.