Staff Engineer - Post Silicon Validation

Job Title

Staff Engineer - Post Silicon Validation

Role Summary

Senior validation engineer responsible for post-silicon bring-up, validation, characterization, and release of FPGA IP and subsystems. Works on lab bring-up, test-plan development, RTL test logic, data analysis, and cross-functional debug with design, verification, manufacturing, test, and applications teams.

Experience Level

Senior — 8+ years of relevant silicon validation, board bring-up, or high-speed interface experience.

Responsibilities

Primary hands-on responsibilities from silicon arrival through product release.

• Plan and execute post-silicon validation and characterization for IP blocks (SERDES, memory PHYs, PLLs, DSP, MIPI, I/O, fabric, etc.).
• Develop validation and characterization plans, test benches, and bench hardware/software setups.
• Implement RTL test logic and FPGA prototypes to exercise and validate IP functionality.
• Perform silicon bring-up, debug failures, and drive issues to closure with design and test teams.
• Characterize datasheet parameters, analyze measured data statistically, and contribute to datasheet preparation.
• Use bench instrumentation (BERT, VNA, oscilloscopes, protocol analyzers/exercisers) for measurements and debug.
• Automate test flows and characterization using scripting and test frameworks.
• Serve as a central technical resource across design, verification, manufacturing, test, quality, and applications during product ramp.
• Support customer issues post-release as needed to diagnose and resolve field problems.

Requirements

Essential skills and experience required for the role.

• 8+ years of industry experience in silicon validation, board bring-up, or related roles.
• Proven ability to lead a small technical team or act as a technical lead.
• Expertise in high-speed SerDes characterization and protocol compliance (PCIe, Ethernet, SDI, CoaXPress, JESD204, MIPI D-PHY, MIPI CSI/DSI, USB, DisplayPort/HDMI).
• Experience in high-speed board design, signal integrity evaluation, and debug.
• Proficiency in Verilog/VHDL and use of FPGA development/prototyping tools for validation.
• Experience developing test automation using Python, Perl, or similar languages.
• Knowledge of statistical analysis and tools (e.g., JMP, R) for interpreting characterization data.
• Hands-on experience with bench equipment: BERT, VNA, high-speed oscilloscopes, and protocol analyzers/exercisers.
• Exposure to FPGA emulation/prototyping methodologies.
• Strong written and verbal communication, self-motivation, and problem-solving/debugging skills.

Education Requirements

Electrical Engineering degree required (the posting lists an "Electrical Engineering degree" as the education expectation). No explicit alternative-equivalent wording was provided.

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.