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Staff Engineer, Physical Design - PnR Implementation & Methodology

Synopsys
October 20, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Physical Design Jobs, Level - Senior

Job Title

Staff Engineer, Physical Design - PnR Implementation & Methodology

Role Summary

Drive Place-and-Route (PnR) implementation and methodology improvements for advanced semiconductor designs. Work on design closure, signoff, and PPA optimization while collaborating with cross-functional and geographically distributed engineering teams.

Experience Level

Senior. Experience guidance: typically 5+ years with a bachelor's degree or 3+ years with a master's degree (see Education Requirements for details).

Responsibilities

Key day-to-day responsibilities include executing PnR flows, performing signoff activities, and improving implementation efficiency and quality.

  • Drive PnR implementation for complex designs and execute/optimize PnR flows.
  • Use Fusion Compiler and/or Innovus for place-and-route tasks.
  • Perform physical signoff using tools/methodologies such as ICV, RedHawk, PrimeTime, StarRC, or equivalents.
  • Analyze implementation results and identify PPA improvement opportunities.
  • Debug complex implementation and flow issues; root-cause analysis and resolution.
  • Contribute to automation, methodology enhancements, and flow robustness/scalability.
  • Collaborate with global, cross-functional teams to resolve design and closure challenges.
  • Explore productivity improvements, including AI-assisted engineering tools.

Requirements

Must-have technical skills and experience for success in this role.

  • Hands-on experience in PnR design implementation and/or PnR flow methodologies.
  • Comprehensive understanding of the PnR development flow and implementation lifecycle.
  • Practical experience with Fusion Compiler (FC) or Cadence Innovus.
  • Familiarity with physical-design signoff tools and methodologies.
  • Experience with signoff and analysis tools such as ICV, RedHawk, PrimeTime, StarRC, or similar.
  • Experience driving PPA improvement and flow optimization activities.
  • Strong debugging, analytical, and problem-solving skills.
  • Proven ability to collaborate and influence in cross-cultural, multi-geography, matrixed teams.
  • Nice-to-have: exposure to AI-assisted engineering tools (for example Cursor) and experience improving automation/productivity.

Education Requirements

BS/B.Tech in Electrical Engineering (EE), Electronics & Communication Engineering (ECE), or equivalent with 5+ years of relevant experience; OR MS/M.Tech in EE/ECE or equivalent with 3+ years of relevant experience. Equivalent practical experience is acceptable where stated.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-10-13