Staff Engineer - Physical Design
Senior ASIC Physical Design engineer responsible for implementing and hardening DDR and HBM PHYs for customer ASICs and SoCs. Work spans synthesis, physical design, verification, design-for-test (DFT) and ATPG within a service line focused on DDR/HBM PHY hardening.
Serve as a senior member or project design engineer collaborating with internal and external teams, providing technical leadership, status updates, and mentoring junior engineers.
Senior — the posting requires a minimum of 5+ years of related ASIC physical design experience.
Key responsibilities include:
Must-have technical skills and experience:
Not specified.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
