Staff Engineer, EM/IR

Job Title

Staff Engineer, EM/IR

Role Summary

Work on SoC and block-level EM/IR analysis and closure for power delivery networks (PDN). Collaborate with physical design, floorplan/APR, package, system and PMIC teams to ensure grid robustness under dynamic and static conditions.

Experience Level

Level - Senior. Requires 8+ years of relevant experience post Bachelor's/Master's degree (as stated in original posting).

Responsibilities

Key responsibilities include analysis, modeling, and mitigation of PDN and IR-drop issues across chip, package, and system levels.

• Perform dynamic and static IR-drop assessment and closure at block and SoC level.
• Model power delivery networks, including on-die power gating and in-rush current profiles.
• Model IP current profiles and peak current demands; use results to guide PDN design.
• Evaluate and optimize voltage-rail assignments and regulator requirements for SoC power distribution.
• Provide feedback on power-grid robustness to floorplan and APR teams.
• Work with system, PMIC, and package teams to model voltage response of the delivery network.
• Drive convergence for high-frequency PDN design and Vmin/VCD analysis using commercial EDA tools.
• Mentor and coordinate with cross-functional teams during closure activities.

Requirements

Must-have skills and experience for successful performance in this role.

• 8+ years of experience leading block- or chip-level physical design and EM/IR activities.
• Strong expertise in power-grid requirement assessment and closure for PDN.
• Practical understanding of package- and board-level power requirements and on-die PDN electrical properties, including power gating.
• Experience with EDA tools for EM/IR analysis and PDN verification (Voltus/RHVoltus or equivalent) and Vmin/VCD flows.
• Proficiency in scripting, data analysis, and problem-solving to automate analysis and interpret results.
• Ability to collaborate across teams and drive solutions in a dynamic environment.
• Willingness to travel up to 10% of the time.

• Experience optimizing regulator assignments and advanced SoC power-distribution strategies.
• Prior exposure to system-level power and PMIC interaction modeling.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics, VLSI Engineering, or a related technical field is specified in the source. The posting pairs these degrees with the 8+ years of experience requirement.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.