Staff Engineer, Design Verification Engineering

Job Title

Staff Engineer, Design Verification Engineering

Role Summary

The Staff Engineer will lead verification of mixed-signal and digital interfaces for data center, energy, and automotive products. The role architects and implements metric-driven SystemVerilog/UVM verification environments, develops directed and constrained-random tests, and supports mixed-signal simulation and product definition.

This position works on module-level RTL and functional verification, collaborates with design and system teams, and supports delivery of production-quality silicon. Partial telecommute is available (approximately two days per week remote).

Experience Level

Senior — Staff-level engineering role. Typical requirement: 4–6+ years of relevant verification or design verification experience.

Responsibilities

The engineer will define verification scope, create test plans, implement verification environments, and close coverage for assigned projects.

• Define and verify interfaces, state machines, and control logic for new products.
• Develop directed and constrained-random test cases in SystemVerilog and UVM.
• Architect, implement, and manage metric-driven verification environments and regression suites.
• Author SystemVerilog Assertions for dynamic and formal verification.
• Perform mixed-signal simulation using Cadence AMS; write Verilog-AMS and real-number models.
• Create and execute verification test plans, manage coverage closure, and maintain regression suites.
• Collaborate with digital and analog design teams during product definition and bring-up.

Requirements

Key technical skills and domain experience required. Degree details are summarized under Education Requirements below.

• Demonstrated expertise with mixed-signal IC verification techniques using SystemVerilog and UVM.
• Proven experience defining, designing, and verifying custom state machines and control logic for analog/mixed-signal circuits (data converters, regulators, high-speed serial interfaces, microcontrollers).
• Experience defining and implementing digital control interfaces (I2C, SPI, UART).
• Experience with logic synthesis, timing and placement constraints, timing and power analysis, logic equivalence checking, design-for-test (scan insertion), and ATPG.
• Familiarity with verification simulators and tooling such as Xcelium or VCS.
• Proficiency with scripting and programming for verification automation (Perl, Python, C).
• Experience with coverage-driven verification, test plan creation, and regression management.

Education Requirements

Master's degree in Electrical Engineering, Materials Engineering, Physics, or a closely related technical discipline (foreign education equivalent accepted) with 4 years of relevant experience; OR Bachelor's degree in the same fields with 6 years of relevant experience. No specific certifications listed.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.