Staff Engineer - Design Verification

Job Title

Staff Engineer - Design Verification

Role Summary

Lead design verification for high-performance CPU core microarchitecture. Drive verification strategy, architecture validation, and closure across simulation and emulation platforms to ensure functional correctness and performance for silicon delivery.

Collaborate closely with Architecture and Design teams to validate ISA behavior and complex microarchitectural features.

Experience Level

Senior — 7+ years of relevant design verification experience.

Responsibilities

Primary responsibilities include ownership of end-to-end verification for CPU cores and coordinating verification activities to achieve coverage and silicon readiness.

• Own verification of CPU core components: fetch, decode, execute, pipeline, memory, cache, MMU.
• Validate microarchitectural features: out-of-order execution, branch prediction, cache coherency, virtual memory and paging.
• Develop test plans from architecture specs and drive coverage closure.
• Lead verification methodology and execution using SystemVerilog and UVM.
• Implement testbenches, constrained-random tests, scoreboards, checkers, and functional/code coverage models.
• Run regressions and debug complex failures across simulation and emulation platforms; drive root-cause and closure.
• Perform ISA-level validation and compliance testing for target ISAs (e.g., RISC-V, ARM, x86).

Requirements

Must-have technical skills and background to perform the role.

• Extensive hands-on experience with SystemVerilog and UVM for complex SoC/CPU verification.
• Proven track record verifying CPU cores and microarchitectural features (OOO, branch prediction, cache coherence, MMU).
• Experience developing constrained-random testbenches, scoreboards, coverage models, and automation for regression runs.
• Strong debug skills across simulation and emulation platforms; ability to drive closure to silicon.
• Experience with ISA-level validation and compliance testing.
• Effective collaboration with architecture and RTL design teams to define verification scope and close corner cases.
• Must be able to pass background checks and provide proof of right to work in India; role may require export-control authorization or successful license acquisition.

Nice-to-have: experience with emulation platforms, hardware bring-up, scripting for test automation (Python, TCL), or prior work on high-performance processor designs.

Education Requirements

Bachelor's or Master's degree in Engineering (e.g., B.E./B.Tech/M.E./M.Tech) is specified in the posting.

About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.