Staff Engineer, Design

Job Title

Staff Engineer, Design

Role Summary

Design engineer for Non-Volatile Memory Datapath Functional Group responsible for design, timing optimization, layout supervision, and functional/timing validation of datapath and high-speed DDR/serial interfaces for flash memory products.

Work with cross-functional teams (floorplanning, application engineering, CMOS/modeling, reliability) to translate system specs into circuit requirements and validate from cell level to full-chip using industry simulation tools.

Experience Level

Senior - typically requires 5+ years of semiconductor industry experience in analog/mixed-signal, high-speed interface, memory, SerDes, or AMS architecture design.

Responsibilities

Key responsibilities include circuit design, validation, documentation, and cross-functional technical leadership.

• Design and optimize block-level and sub-system high-speed circuits and timing for memory datapath and DDR/serial interfaces.
• Perform functional and timing validation from base cells to full-chip using HSPICE, FastSPICE, NC Verilog and mixed-signal flows.
• Supervise analog/mixed-signal layout activities and drive parasitic-aware design and layout signoff.
• Define block-level micro-architecture/specifications in accordance with relevant industry standards.
• Collaborate with floorplanning, application engineering, and CMOS/modeling teams to align circuit requirements with full-chip integration and process characteristics.
• Contribute to Design-Technology Co-Optimization (DTCO) efforts to balance performance, power, area, and cost (PPAC).
• Adopt and apply "Design + AI" approaches to accelerate design and validation workflows.
• Provide technical leadership, mentor engineers, and drive complex technical initiatives to delivery.

Requirements

Must-have technical skills and experience.

• Analog/mixed-signal CMOS circuit design experience in deep sub-micron technologies (5–40 nm) for high-speed interfaces or SerDes; experience with parallel or serial interfaces.
• Ability to define and execute integrated AMS solutions combining analog circuit and digital/RTL techniques to improve architecture and performance.
• Proficiency with industry-standard EDA tools and flows: Cadence ADE/Virtuoso, Spectre, AMS verification, Calibre, MATLAB; experience with HSPICE/FastSPICE and NC Verilog.
• Experience supervising complex analog layouts, defining IP floorplans, and driving parasitic-aware design methodologies through layout signoff.
• Knowledge of power delivery and analog building blocks (bandgap references, LDOs, bias circuits) and ability to develop block-level specifications from system/link-budget requirements.
• Deep understanding of CMOS device physics, power trade-offs, mismatch analysis, Monte Carlo methodologies, transistor-level noise analysis, and circuit reliability.
• Working knowledge of mixed-mode simulation, signal integrity, package interactions, ESD design, and system-level validation methodologies.
• Digital design and modeling skills: RTL methodologies plus behavioral/system-level modeling using Verilog-A, SystemVerilog, and Python; strong communication and cross-functional collaboration skills.

Nice-to-have:

• Plane datapath design experience.
• Experience leveraging AI-enabled tools and agentic AI workflows to improve productivity.

Education Requirements

M.Tech. or Ph.D. in Microelectronics or a related discipline. The posting specifies 5+ years of semiconductor industry experience in analog/mixed-signal, high-speed interface, memory, SerDes, or AMS architecture design.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.