Staff Engineer - DEG Layout

Job Title

Staff Engineer - DEG Layout

Role Summary

Senior layout engineer responsible for physical implementation and verification of analog, mixed-signal and custom digital blocks through full-chip integration. Works within a global engineering team to deliver high-quality layouts on advanced CMOS processes, improve productivity through automation and support multiple tape-outs.

Experience Level

Senior — typically 12 to 18 years of relevant experience as stated in the posting.

Responsibilities

Core responsibilities include hands-on layout work, verification, automation and team leadership:

• Perform layout design and development for critical analog, mixed-signal, custom digital blocks, standard cells and full-chip level.
• Execute physical verification such as LVS, DRC, antenna, matching, latch-up, EM/IR and totem checks; perform quality checks and documentation.
• Develop digital block layouts using auto placement and routing tools where applicable.
• Implement scripting/Skill coding and automation to streamline layout tasks and reduce manual effort, including use of AI tools.
• Estimate area/time, plan and schedule work across multiple projects to meet delivery milestones.
• Guide and review work of less-experienced layout engineers; provide technical leadership on layout execution.
• Coordinate effectively with global engineering teams and contribute to project management and tape-out support.

Requirements

Must-have technical skills and experience; listed concisely.

• 12–18 years of analog/custom layout experience in advanced CMOS process nodes.
• Proven expertise with Cadence VLE/VXL and Mentor Graphics Calibre (DRC/LVS).
• Hands-on experience laying out critical analog blocks (e.g., temperature sensors, PLLs, ADCs/DACs, LDOs, bandgaps, reference generators, charge pumps, current mirrors, comparators, differential amplifiers).
• Strong understanding of analog layout fundamentals: matching, electromigration, latch-up, coupling/crosstalk, IR drop, and parasitic effects.
• Ability to understand design constraints and implement high-quality, manufacturable layouts; strong physical verification and problem-solving skills.
• Experience applying automation and AI tools to reduce layout effort.
• Excellent verbal and written communication skills.

Nice-to-have: multiple tape-out experience; familiarity with auto P&R flows for digital blocks.

Education Requirements

Not specified.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.