Staff Engineer - CPU DV

Job Title

Staff Engineer - CPU DV

Role Summary

Lead design verification for high-performance CPU core microarchitecture, owning DV strategy, architecture validation, and closure through silicon bring-up. Work with architecture and design teams to ensure functional correctness, performance, and quality of CPU cores.

Experience Level

Senior level - requires 6+ years of relevant verification experience.

Responsibilities

Key responsibilities include end-to-end verification, developing DV infrastructure, and validating microarchitectural features.

• Own verification of CPU core components: Fetch, Decode, Execute, Memory, Pipeline, Cache, MMU.
• Validate microarchitectural features such as out-of-order execution, branch prediction, cache coherency, and virtual memory/paging.
• Create test plans from architectural specifications and drive coverage closure.
• Lead verification using SystemVerilog and UVM.
• Develop testbenches, constrained-random tests, scoreboards, checkers, and coverage models (functional and code).
• Run regressions and debug complex failures across simulation and emulation platforms.
• Collaborate with Architecture & Design teams to validate corner cases, exceptions, interrupts, and perform ISA-level validation and compliance testing.

Requirements

Must-have technical skills and experience to perform the role; followed by desirable skills.

• Must-have: 6+ years of CPU design verification experience; proven DV leadership on CPU microarchitecture.
• Strong SystemVerilog and UVM experience; testbench development and constrained-random verification.
• Experience building scoreboards, checkers, and coverage-driven verification.
• Experience debugging across simulation and emulation platforms and driving regressions to closure.
• Familiarity with ISA behavior (RISC-V, ARM, or x86) and performing ISA-level validation and compliance testing.
• Nice-to-have: Hands-on experience with out-of-order cores, branch predictors, cache-coherent systems, MMU/virtual memory, and large-scale emulation flows.
• Ability to lead DV strategy and coordinate cross-functional teams.
• Eligible to work in India; employment contingent on background checks and required export-control authorization.

Education Requirements

Not specified.

About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.