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Staff Engineer - Analog Mixed-Signal Verification

Infineon Technologies
October 23, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Verification Jobs, Level - Senior

Job Title

Staff Engineer - Analog Mixed-Signal Verification

Role Summary

Develop and verify real-number and behavioral models (RNM/WREAL) for analog and mixed-signal IPs and integrate them into SoC-level verification flows. Collaborate with analog design teams to correlate models to transistor-level schematics and to deploy automated verification and regression infrastructure.

Experience Level

Senior - typically requires 5+ years of AMS / mixed-signal verification experience.

Responsibilities

Key responsibilities include modeling, verification, correlation, automation, and SoC integration.

  • Develop and maintain SystemVerilog RNM and WREAL behavioral models for analog and mixed-signal IPs.
  • Verify and correlate RNM/WREAL models against transistor-level schematics and analog simulation results.
  • Create and deploy SystemVerilog Assertions (SVA) for protocol, functionality, timing, and design correctness checks.
  • Perform SoC-level analog vector verification using DMS verification flows, UVM testbenches, and RNM models.
  • Develop automated checkers, reusable verification components, and regression flows.
  • Analyze simulation results, debug failures, and drive coverage closure.
  • Collaborate with analog design teams to establish and maintain model-to-schematic correlation.
  • Build automation frameworks and regression infrastructure using scripting languages.
  • Contribute to AMS verification methodology improvements and simulator evaluation/adoption.

Requirements

Must-have technical skills and experience; a short list of desirable areas follows.

  • 5+ years of experience in AMS / mixed-signal verification.
  • Hands-on experience with SystemVerilog RNM (Real Number Modeling) and WREAL modeling.
  • Strong UVM methodology experience and SoC-level DMS verification using RNM models.
  • Experience writing and applying SystemVerilog Assertions (SVA).
  • Proven ability to develop behavioral models for analog IPs and validate them against schematic-level simulations.
  • Experience with verification planning, coverage closure, debugging, and regression management.
  • Proficient scripting skills for automation (Python, Perl, Shell).
  • Experience developing verification automation, checkers, and regression flows.
  • Nice-to-have: experience driving methodology enhancements and evaluating simulators for AMS verification.

Education Requirements

Not specified.


About the Company

Company: Infineon Technologies

Headquarters: Villach, Austria

Infineon Technologies is a leading global semiconductor manufacturer specializing in power management technology and integrated circuits. The company is dedicated to innovation and plays a critical role in the development of cutting-edge solutions for various applications including automotive, industrial, and consumer electronics.

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Date Posted: 2026-10-23