Staff Digital Verification Engineer, GPU Hardware Design
QualcommJob Title
Staff Digital Verification Engineer, GPU Hardware Design
Role Summary
Lead digital verification strategy and execution for complex GPU and SoC hardware on the GPU Hardware Design team. Collaborate across architecture, RTL, emulation, software, and silicon teams to develop scalable verification environments and achieve coverage closure through sign-off.
Experience Level
Senior - typically requires 8+ years of relevant digital design verification experience and demonstrated technical leadership on complex projects.
Responsibilities
Accountable for planning, developing, and delivering comprehensive verification solutions and mentoring team members.
- Define verification plans, test strategies, milestones, and measurable coverage goals.
- Architect and maintain scalable SystemVerilog/UVM environments including agents, drivers, monitors, scoreboards, and reference models.
- Lead constrained-random, directed, assertion-based, formal-assisted, emulation, and post-silicon verification activities.
- Develop verification methodologies for control logic, datapaths, pipelines, interfaces, memory transactions, and corner cases.
- Drive debug and root-cause analysis across simulation, emulation, regressions, and silicon.
- Establish and manage coverage-closure strategies across functional, code, assertion, and scenario coverage.
- Mentor engineers, conduct design and code reviews, and raise team technical capability.
- Influence architecture and microarchitecture for improved observability and design-for-verification features.
- Collaborate with RTL, architecture, performance, power, physical design, software, and system teams to resolve issues.
- Contribute to verification infrastructure, regression automation, reusable VIP, checkers, and productivity improvements.
Requirements
Technical must-haves and relevant experience.
- Deep hands-on experience with SystemVerilog and UVM-based verification environments.
- Strong understanding of verification methodology: constrained-random testing, assertions, scoreboards, reference models, coverage, regression, and debug.
- Proven ownership of verification for complex IP, subsystems, or SoC components through coverage closure and sign-off.
- Experience with protocol verification and transaction-level checking; familiarity with AMBA protocols (AXI, AHB) preferred.
- Experience developing reference models in C, C++ or Python.
- Proficiency with simulators, waveform/debug tools, regression systems, and common RTL quality flows.
- Strong analytical, debugging, communication, and cross-functional collaboration skills.
- Ability to work independently, influence technical decisions, and drive results.
Nice-to-have:
- Prior verification experience with CPU or GPU architectures, memory subsystems, DMA, interconnects, caches, or coherency.
- Experience with UVM register models, protocol VIP, formal verification, emulation, or FPGA prototyping.
- Experience with verification planning/reporting tools, coverage databases, and large-scale regression infrastructure.
- Experience mentoring across locations and driving cross-functional technical initiatives.
Education Requirements
Required: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Minimum-qualification combinations are specified: Bachelor's +4 years, Master's +3 years, or PhD +2 years of relevant experience. Applications with equivalent practical experience will be considered.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
