Staff Digital Verification Engineer
SynopsysJob Title
Staff Digital Verification Engineer
Role Summary
The Staff Digital Verification Engineer will lead verification efforts for digital ASIC projects within the Engineering (ASIC Digital Design) team based in Bengaluru. The role focuses on defining verification strategy, driving closure of verification goals, and coordinating with design, DFT and related teams to ensure timely delivery.
Experience Level
Senior (Staff-level). Years of experience not specified.
Responsibilities
Key responsibilities include:
- Define verification strategy and plans for digital blocks and subsystems.
- Develop, maintain and validate verification environments and testbenches.
- Lead functional debug and drive closure of coverage and verification deliverables.
- Collaborate with design, DFT, CAD and firmware teams to resolve integration issues.
- Mentor and review the work of other verification engineers.
Requirements
Must-have and preferred items, summarized:
- Proven experience in digital verification and ASIC project delivery.
- Experience developing and maintaining verification environments and testbenches.
- Strong debugging skills and experience closing verification goals.
- Effective communication and cross-functional collaboration skills.
- Nice-to-have: familiarity with verification automation and industry-standard verification languages and tools.
Education Requirements
Not specified.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
