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Staff Digital Engineer

Renesas
September 22, 2026
Full-time
On-site
Chandler, Arizona, United States
RTL Design Jobs, Level - Senior

Job Title

Staff Digital Engineer

Role Summary

Join the Power Management IC team in Renesas' Automotive Business Unit to design mixed-signal automotive PMICs. The role focuses on digital RTL and top-level integration for chips used in automotive systems, working closely with analog, verification, P&R, test, and applications teams.

The position involves full-cycle involvement from specification through production validation and contributing to design standards and architecture decisions.

Experience Level

Senior - typically 5–11+ years of digital IC design experience, with demonstrated ownership of complex RTL and integration work.

Responsibilities

Primary responsibilities include digital design, integration, verification support, and cross-functional coordination for mixed-signal PMIC projects.

  • Design synthesizable digital RTL meeting timing, area, power, and standards requirements.
  • Integrate blocks at top level and run block- and top-level simulations.
  • Participate across mixed-signal design flow: micro-architecture, partitioning, RTL (Verilog/SystemVerilog), timing constraints, synthesis, LINT, CDC, and timing analysis.
  • Collaborate with and supervise P&R to produce layouts that meet timing, area, and power targets.
  • Develop and assist with top-level testbenches and run gate-level simulations.
  • Work with analog and digital verification engineers to define complex pre-silicon test scenarios.
  • Develop AMS or behavioral models as needed and produce detailed design documentation.
  • Lead or participate in design reviews and complete required design checklists.

Requirements

Key technical and collaboration requirements. Degree requirements are listed in Education Requirements below.

  • Must have: 5–11+ years of experience in digital IC design with strong design fundamentals and attention to detail.
  • Must have: Demonstrated ability to create robust, synthesizable designs and to reason about timing constraints and silicon implementation.
  • Must have: Practical experience with industry-standard EDA tools (experience with at least two vendors such as Synopsys, Cadence, Mentor, Siemens).
  • Must have: Strong written and verbal communication skills, and experience collaborating across multi-site, cross-functional teams.
  • Nice to have: Experience developing AMS, SystemVerilog or Verilog-real behavioral models.
  • Nice to have: Experience with P&R supervision, automotive PMICs, or other mixed-signal IC projects.

Education Requirements

Bachelor's degree required. The posting does not specify a field of study or mention equivalent-experience language.


About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

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Date Posted: 2026-08-13