Staff DFT Engineer

Job Title

Staff DFT Engineer

Role Summary

Senior staff engineer in the Design-for-Test (DfT) team responsible for defining DfT strategy and delivering DfT implementation and verification for mixed-signal ASIC designs. Collaborate with design, STA, layout and test teams across sites to enable testability, verify gate-level and timing behavior, and support silicon debug and ATE pattern delivery.

Experience Level

Senior (Staff-level). Years of experience not specified in the posting.

Responsibilities

Lead and execute DfT activities across the design flow and with cross-functional teams.

• Define DfT strategy and create requirement specifications for designs.
• Perform DfT verification for gate-level and timing simulations.
• Insert scan, compression, memory BIST and JTAG/IJTAG features and validate their operation.
• Work with STA engineers to define timing constraints for DfT modes and run Primetime analyses.
• Collaborate with layout engineers to ensure correct DfT implementation.
• Support test engineering in silicon debug and deliver patterns for ATE.
• Investigate and resolve DfT simulation failures, ATPG coverage gaps, and DRC issues.
• Develop and maintain RTL and scripts used for DfT flows and verification.

Requirements

Key technical skills and background required or strongly preferred.

• Must-have: Strong experience with scan insertion, compression, ATPG, memory BIST and JTAG at the IC level for mixed-signal designs.
• Must-have: Expertise in IJTAG, SSN and ATPG verification methodologies.
• Must-have: Experience with Mentor DfT tools and Synopsys tools (Design Compiler and simulators).
• Must-have: Hands-on experience debugging DfT problems, improving ATPG coverage and resolving DRC issues.
• Must-have: Experience with gate-level and timing simulations and use of Primetime for timing constraints.
• Must-have: RTL coding and shell/Perl scripting skills.
• Must-have: Experience supporting silicon debug and delivering patterns for ATE.
• Must-have: Experience handling analog IP DfT simulations.

Nice-to-have:

• Familiarity with SystemVerilog interfaces and lint checks.
• Proven ability to work across sites and with multiple engineering disciplines (design, STA, layout, test).

Education Requirements

Not specified.

About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.