Staff Design Verification Engineer

Job Title

Staff Design Verification Engineer

Role Summary

The Staff Design Verification Engineer provides technical leadership for verification of complex analog and mixed-signal designs. This role architects verification strategies and environments, mentors engineers, and coordinates across design and product teams to ensure verification completeness and product quality.

Works with limited direction on high-impact verification challenges, influences methodology adoption, and represents the organization in technical customer interactions.

Experience Level

Senior — typically 7–10+ years of relevant digital/mixed-signal design verification experience (as stated in the posting).

Responsibilities

Primary responsibilities focus on defining verification strategy, building verification environments, driving coverage closure, and supporting post-silicon validation.

• Architect and lead verification strategy for complex digital and mixed-signal designs.
• Design and implement UVM-based verification environments to achieve comprehensive test and coverage goals.
• Develop verification plans and drive coverage-driven verification closure.
• Guide and mentor junior verification engineers; promote best practices and methodology adoption.
• Coordinate verification requirements and sign-off criteria with cross-functional design teams.
• Lead complex debugging across RTL and gate-level simulations and develop robust resolutions.
• Drive functional and code coverage closure using advanced verification methodologies.
• Lead post-silicon validation activities and support resolution of critical silicon issues.
• Act as a principal technical contact for customers and industry partners on verification matters.
• Occasional travel required (up to ~10%).

Requirements

Must-have technical skills and experience for immediate contribution.

• Expert-level SystemVerilog and UVM for architecting advanced verification environments.
• Proven ability to create and execute comprehensive test plans and verification strategies.
• Deep understanding of mixed-signal verification methodologies and practical implementation experience.
• Advanced debugging skills across multiple design abstractions (RTL, gate-level).
• Extensive experience with EDA tools (Cadence, Synopsys) and formal verification techniques.
• Advanced scripting and automation skills (Python, Perl, TCL, Shell) for verification frameworks.
• Demonstrated technical leadership: mentoring, influencing verification direction, and driving methodology adoption.

Education Requirements

MS or PhD in Electrical Engineering, Computer Engineering, or a related field (specified as preferred in the posting).

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.