Staff Design Verification Engineer, AI HW
TenstorrentJob Title
Staff Design Verification Engineer, AI HW
Role Summary
Join the Tensix team to validate AI compute cores, RISC-V CPUs, and chiplet-based subsystems. You will design and run verification plans, build scalable DV infrastructure, and work across design, firmware, compiler, and architecture teams to ensure functional correctness through tape-out.
This is a hybrid role based out of Toronto, ON; Austin, TX; or Belgrade, Serbia. Candidates will be assessed during interviews and offers will align with assessed level.
Experience Level
Senior (Staff). The team will evaluate candidates during the interview process and may adjust level and offer accordingly.
Responsibilities
Key responsibilities include verification ownership, infrastructure development, and cross-functional debugging.
- Own verification plans and coverage goals for Tensix IP and subsystems from early planning through tape-out.
- Build and maintain reusable verification environments, agents, scoreboards, and supporting infrastructure in SystemVerilog and Python.
- Develop constrained-random and directed tests; close functional, code, and assertion coverage using data-driven approaches.
- Debug complex issues across RTL, testbench, and software-driven workloads, collaborating with design, firmware, compiler, and architecture teams.
- Improve regression flows, CI/CD integration, EDA compute environments, and reproducible setups across hybrid compute resources.
- Validate system-level behavior and microarchitecture correctness using simulation, emulation, and software workloads.
Requirements
Must-have technical skills and experience to perform this role.
- Strong SystemVerilog skills and experience with structured testbench development.
- Experience from block-level to system-level verification and reasoning about microarchitecture from specs and waveforms.
- Proficient in Linux with Python or Bash scripting for automating builds, parsing logs, and managing CI pipelines.
- Experience with coverage-driven verification and debugging across RTL, testbench, and workload scenarios.
- Experience building or operating scalable DV infrastructure, regression systems, and CI integrations.
Nice-to-have:
- Exposure to functional safety (FuSa) verification concepts for automotive AI workloads.
- Familiarity with formal verification methodologies, SystemVerilog Assertions (SVA), or formal property verification.
Education Requirements
Not specified.
Compensation for engineers at Tenstorrent ranges from $100k - $500k including base and variable components; actual offer depends on experience, skills, location, and other factors.
Employment is contingent on eligibility to access U.S. export-controlled technology. Offers may be contingent on citizenship/permanent residency or approval by the U.S. Commerce Department or applicable agency; if employment is not possible due to export laws, offers may be rescinded.
About the Company
Company: Tenstorrent
Headquarters: Austin, Texas, United States
Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.
