Staff CAD and Methodology Design Engineer

Job Title

Staff CAD and Methodology Design Engineer

Role Summary

Support and optimize the RTL-to-GDS design flow for the Project CAD team in the Adaptive & Embedded Computing Group (AECG). Work across synthesis, place-and-route, and physical signoff, deploying and maintaining tools, PDKs, and flow collateral for multiple semiconductor projects.

Experience Level

Senior. No specific years-of-experience guidance provided.

Responsibilities

The role focuses on maintaining and improving RTL-to-GDS flows, supporting CAD infrastructure, and enabling teams with tools and methodologies.

• Support CAD infrastructure and the RTL-to-GDS flow across multiple IC design projects.
• Maintain and standardize RTL-to-GDS design flows and methodologies (synthesis → P&R → signoff).
• Implement and support customized flows for fabric/design groups and project-specific requirements.
• Work with external tool vendors to resolve issues and meet development targets.
• Develop and improve tool-flow methodologies for timing, power, EM/IR, and DRC/LVS/DFM signoff.
• Debug issues across the RTL-to-GDS implementation flow and raise trouble tickets with vendors as needed.
• Build and maintain automation and flow scripts (TCL, Python) to increase quality and execution speed.
• Support tool deployments, PDK enablement, and the unified environment that sets tool/PDK/design versions.
• Leverage and deploy internal AI systems to assist design teams.

Requirements

Key skills and experience required or strongly preferred. Education is listed separately below.

Must-have:

• Experience with RTL-to-GDS flows and methodology across synthesis, place-and-route, and signoff.
• Proficient scripting/programming skills (TCL and Python strongly preferred).
• Experience with static timing analysis and constraint management.
• Proven ability to debug implementation flow issues and coordinate fixes with design teams and vendors.
• Strong written and verbal communication skills and experience collaborating across sites/time zones.

Nice-to-have / Preferred:

• Familiarity with Fusion Compiler / IC Compiler / Innovus or equivalent P&R tools.
• Experience with PrimeTime (timing), Calibre (DRC/LVS/DFM), extraction, and Totem/Redhawk for EM/IR.
• PDK and technology enablement experience.
• Low-power methodology knowledge (UPF) and power-integrity practices.
• Experience with PERL or other scripting languages and building flow automation.

Education Requirements

Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.

About the Company

Company: Advanced Micro Devices

Headquarters: Sunnyvale, California, USA

Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.