Staff Applications Engineer, HAV Solutions
SynopsysJob Title
Staff Applications Engineer, HAV Solutions
Role Summary
Provide technical support for customers deploying Synopsys HAPS and ProtoCompiler for FPGA-based prototyping of SoC designs. Work across the ASIC-to-FPGA flow-partitioning, synthesis, place-and-route, timing closure, and hardware bring-up-and collaborate with R&D, Product, Sales, and Customer Success to resolve issues and enable successful prototype bring-up.
Experience Level
Senior-level. The role targets candidates with approximately 5β8 years of experience in FPGA implementation, ASIC design, verification, prototyping, or applications engineering.
Responsibilities
Key responsibilities include customer-facing technical work and internal collaboration to enable prototype bring-up and software enablement.
- Support customer deployments of HAPS and ProtoCompiler across the ASIC-to-FPGA flow: partitioning, synthesis, place-and-route, timing closure, and hardware bring-up.
- Debug designs that use interface IP (DDR4/DDR5, LPDDR, PCIe, Ethernet, USB, AXI) and diagnose prototype vs. simulation failures.
- Reproduce, analyze, and isolate technical issues reported by customers; coordinate with R&D to identify root causes and deliver fixes or workarounds.
- Develop and document methodologies for partitioning strategies, clock architecture, debug instrumentation, and bring-up procedures.
- Support technical evaluations, proof-of-concept engagements, and deployment planning with Sales and Customer Success.
- Use debug tools and protocol analyzers (e.g., Verdi, ProtoCompiler runtime tools) to troubleshoot RTL, netlist, timing, and hardware issues.
Requirements
Concise list of required and desirable skills. Degrees are summarized under Education Requirements below.
- Must-have: 5β8 years of hands-on experience in FPGA implementation, ASIC design, verification, FPGA prototyping, or applications engineering.
- Must-have: Practical experience with FPGA synthesis, place-and-route, and timing closure using tools such as Xilinx Vivado or Intel Quartus.
- Must-have: Working knowledge of SystemVerilog, RTL design, and verification concepts; ability to read logs, waveforms, and timing reports to diagnose problems.
- Must-have: Hands-on experience with at least one interface IP family (PCIe, DDR, Ethernet, USB, AXI) and understanding of prototype vs. simulation behavior.
- Must-have: Scripting skills for automation and flow customization (Tcl, Python, or shell).
- Must-have: Strong debugging, troubleshooting, and customer-communication skills for on-site or remote support engagements.
- Nice-to-have: Direct experience with Synopsys HAPS, ProtoCompiler, or other FPGA-based prototyping platforms.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
