Staff Applications Engineer, Fusion Compiler

Job Title

Staff Applications Engineer, Fusion Compiler

Role Summary

Provide technical customer support and enable design closure using Synopsys Fusion Compiler. Work directly with customer design teams and internal R&D to diagnose and resolve timing, congestion, power, routing, and implementation issues at advanced process nodes.

The team focuses on Fusion Compiler deployment, advanced-node implementation, automation, and driving RTL-to-GDS flow success for tapeout readiness.

Experience Level

Senior - typically 5–8 years of hands-on ASIC, physical design, implementation, or CAD engineering experience.

Responsibilities

Provide technical leadership and hands-on support through implementation and signoff.

• Support customers through physical design implementation and design closure using Synopsys tools.
• Debug timing, power, area, congestion, routing, and runtime optimization issues at advanced nodes (5nm and below).
• Help customers meet tapeout schedules and design quality requirements.
• Provide guidance on synthesis, place-and-route, timing closure, power optimization, and advanced implementation methodologies.
• Build and maintain automation scripts in Python, Perl, and TCL to streamline workflows.
• Utilize AI-assisted tools and workflows to accelerate debugging and improve productivity.
• Collaborate with internal R&D to reproduce customer issues and validate tool behavior.
• Present technical solutions and recommendations to senior customer engineers and design leads.
• Work across the full RTL-to-GDS flow from implementation through signoff and tapeout readiness.

Requirements

Essential skills and practical experience required to perform the role.

• Direct experience with RTL-to-GDS implementation flows: synthesis, place-and-route, timing closure, and physical design optimization.
• Strong working knowledge of Fusion Compiler, ICC2, or equivalent digital implementation tools.
• Understanding of timing, power, congestion, routing, and design closure methodologies.
• Proficiency in scripting with Python, Perl, and TCL to automate design tasks.
• Familiarity with Formality, Formality ECO, PrimeTime, or related EDA tools (advantage).
• Experience with advanced process nodes (7nm and below) is a strong plus.
• Ability to leverage AI tools and automation to improve engineering productivity.
• Business-level English with clear written and verbal communication skills.
• Willingness to engage directly with customers in both remote and onsite settings and to work across time zones.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. The posting specifies at least 5–8 years of hands-on ASIC, physical design, implementation, or CAD engineering experience.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.