Staff Applications Engineer

Job Title

Staff Applications Engineer

Role Summary

Senior applications engineer on the Silicon Product Enablement team supporting factory and customer adoption of Lattice FPGA devices. The role drives silicon feature enablement, produces enablement collateral and training, and provides technical support to resolve manufacturing and customer issues.

The position works closely with sales, technical support, factory teams and R&D to translate customer needs into reliable silicon solutions and documentation.

Experience Level

Senior — requires extensive experience; posting specifies 10+ years of relevant experience.

Responsibilities

Primary responsibilities focus on silicon enablement, customer/factory support, and cross-functional collaboration.

• Drive silicon feature enablement and improvements for domains such as IO, memory, SerDes, PLLs, and other foundational blocks.
• Develop usability- and performance-focused enablement collateral, application notes, and design guides.
• Create and deliver trainings and workshops for sales, technical support and factory personnel.
• Provide factory-level support and guidance to resolve customer production and design issues.
• Collaborate with sales and R&D to capture customer requirements and translate them into product and silicon specifications.
• Participate across product development lifecycle: architecture, specification, validation, documentation and customer release.

Requirements

List of required and desirable technical skills and workplace capabilities.

Must-have:

• Hands-on FPGA bring-up and debugging experience using oscilloscopes, logic analyzers and signal analyzers.
• Expertise in FPGA design flows and RTL languages (Verilog and/or VHDL).
• Practical experience delivering revenue-generating hardware products and supporting them in production.
• Strong written and verbal English communication skills.
• Able to work independently and as part of cross-functional teams.

Nice-to-have:

• Deep knowledge of FPGA architecture and foundational blocks (PLL, embedded memory, DSP, IO blocks).
• Experience with physical interface standards (SSTL, HSTL, LVSTL, HSUL) and signal integrity practices.
• Experience in timing closure, PLL/DLL configuration, and physical interface strategies.
• RTL development and verification experience.

Education Requirements

BS or MS in Electrical Engineering (EE) is specified. The posting also mentions 10+ years of related experience.

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.