Job Title
Staff Analog Design Engineer
Role Summary
Senior analog design engineer responsible for designing and validating high-speed, high-performance SerDes and mixed-signal IP for datacenter, networking, and ASIC products. The role sits within Central Engineering and collaborates with DSP, digital, AE, and layout teams to deliver production-ready IP across advanced process nodes.
Experience Level
Senior (Staff level). Exact years of experience not specified.
Responsibilities
The core responsibilities focus on analog design, cross-discipline architecture work, IP validation, and production support.
- Design analog circuitry for high-speed SerDes and mixed-signal IP targeting advanced nodes (3nm, 2nm and beyond).
- Participate in SerDes architecture development with DSP, analog, and digital teams.
- Define and coordinate IP characterization and validation plans with Applications Engineering (AE).
- Support product integration and customer troubleshooting.
- Provide guidance and instructions to layout engineers for analog and mixed-signal blocks.
Requirements
Must-have technical skills, tools, and domain knowledge.
- Strong analog design fundamentals and hands-on experience designing PLLs, data converters, oscillators, and high-speed SerDes components (CTLE, FFE, DFE, CDR, line drivers, etc.).
- Proficiency with analog design and verification tools such as Cadence Virtuoso, Spectre, ADE, and post-layout extraction tools.
- Knowledge of signal integrity techniques, noise reduction, and multi-GHz low-jitter clock generation and distribution.
- Good understanding of analog layout optimization for high-speed designs.
- Experience with system-level pre-tapeout analog validation and silicon bring-up and debugging.
- Strong communication and documentation skills.
Education Requirements
PhD in Electrical Engineering or a related field (as stated in the posting).
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

Date Posted: 2026-05-05