STA Signoff Flow, Principal AE

Job Title

STA Signoff Flow, Principal AE

Role Summary

Senior technical engineering role focused on static timing analysis and signoff using Cadence Tempus. The role leads timing signoff and ECO campaigns, enables customers and internal teams, and collaborates with R&D to deliver and validate timing solutions.

Experience Level

Senior - 8+ years of experience in static timing analysis and signoff.

Responsibilities

Primary responsibilities include:

• Perform static timing analysis, glitch and noise analysis using Tempus Signoff.
• Develop, execute and lead timing signoff and ECO flows at customer sites.
• Implement and validate SDC constraints, advanced OCV/SOCV concepts, derates, PBA timing, and distributed/concurrent STA flows.
• Perform timing correlation, tool feature benchmarking, constraints validation, and SPICE timing analysis across process nodes.
• Provide in-design timing ECO optimization and coordinate with place-and-route, clock-tree, and extraction activities.
• Automate flows and analysis using scripting (Perl, Tcl, Python).
• Collaborate with R&D to enable tool features, reproduce and close bugs, and validate fixes.
• Prepare and deliver technical trainings and seminars for customers and internal teams.

Requirements

Must-have skills and experience:

• 8+ years of experience in static timing analysis and signoff; proven ability to lead technical engagements.
• Extensive hands-on experience with Cadence Tempus Signoff tool.
• Strong knowledge of SDC constraints, OCV/SOCV, derates, PBA timing, and distributed/concurrent STA.
• Experience with timing correlation, tool benchmarking, constraints validation, and SPICE analysis.
• Working knowledge of physical design concepts: place-and-route, clock tree, RC extraction, UPF/CPF.
• Proficiency in scripting for automation (Perl, Tcl, Python).
• Ability to collaborate effectively with customers and R&D to deliver solutions and close tool issues.

Nice-to-have:

• Experience leading customer signoff campaigns and delivering formal trainings.
• Experience across multiple advanced technology process nodes.

Education Requirements

Not specified.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.