SRAM Memory Design Engineer

Role Summary

The SRAM Memory Design Engineer at Synopsys is responsible for designing and optimizing high-performance, low-power SRAM memory circuits for advanced semiconductor products. The role involves characterizing and analyzing timing, power, and leakage across various memory architectures while collaborating with cross-functional teams.

Experience Level

Mid-Career level, specific years of experience not mentioned.

Responsibilities

The main responsibilities include:

• Designing and optimizing high-performance, low-power SRAM memory circuits.
• Characterizing and analyzing timing, power, and leakage across various memory architectures.
• Applying knowledge of SRAM bit-cell figure of merits, RC networks, and FinFET fundamentals.
• Developing and automating workflows using Perl, Python, or Shell scripting.
• Collaborating with cross-functional teams for memory IP integration and verification.
• Contributing to documentation and process improvement initiatives.

Requirements

Candidates must have:

• Deep knowledge of SRAM bit-cell figure of merits, RC networks, and FinFET fundamentals.
• Hands-on experience in designing high-performance, low-power memory circuits.
• Proficiency in scripting languages like Perl, Python, or Shell.
• Strong analytical skills for timing, power, and leakage characterization.
• The ability to work collaboratively in an engineering environment.

Education Requirements

Not specified.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.