Sr Validation Engineer

Job Title

Sr Validation Engineer

Role Summary

This role owns bench validation, silicon debug, and automation for Power Management ICs (PMICs) within the Power Business Unit. The engineer will develop and execute tests, automate equipment and test flows, analyze and report results, and coordinate with design and systems teams across geographies.

The position includes opportunity to technically lead and mentor a small team and to set up and optimize lab infrastructure for PMIC evaluation.

Experience Level

Senior — requires 5+ years of hands-on experience in bench validation and debug of mixed-signal ICs, with emphasis on PMICs.

Responsibilities

Core responsibilities include end-to-end bench validation and ensuring test quality and efficiency:

• Own bench validation, silicon debug, and test automation for PMICs and evaluation boards.
• Develop, write, and maintain bench test programs (Python, C) and debug ATE programs.
• Define equipment requirements and help set up and commission test labs from scratch.
• Automate equipment and tests to maximize bench and equipment utilization and reduce test cost.
• Analyze test data, prepare reports and documentation, and present findings to systems and design teams.
• Plan and project schedules for test development, execution, and debug; identify gaps and risks.
• Drive ATE-to-bench correlation and validate test comparability across platforms.
• Use FPGAs to test digital functions and emulate system behavior during validation.
• Mentor and ramp up junior engineers and new graduates; provide technical leadership on validation tasks.

Requirements

Must-have technical skills and experience; concise distinction of nice-to-have items follows.

• 5+ years of hands-on bench validation and debug of mixed-signal ICs, specifically PMICs.
• Proficient in writing and debugging test code in Python and C; experience with ATE programming and correlation.
• Strong hands-on experience with validation equipment: power supplies, load slammers, oscilloscopes, probes, multimeters, relays, and instrument-to-board communication.
• Experience defining and executing bench validation plans and evaluation board testing.
• Experience using FPGAs for testing and emulation, and familiarity with digital communication protocols used by power chips (SPMI, PMBus, SVI3, SVID, I2C).
• Able to create basic experimental circuits and debug hardware/equipment issues on the bench.
• Experience in test automation, standardization, and cost optimization for lab operations.
• Strong communication skills to report results and coordinate with distributed design and systems teams.
• Proven ability to plan schedules, identify execution risks, and deliver high-quality results under tight timelines.
• Demonstrated mentorship or technical leadership experience.

Nice-to-have:

• Board design experience.
• Experience with evaluation board design and manufacturing considerations.

Education Requirements

Bachelor's or master’s degree in Electrical Engineering. (Degree requirement specified in source.)

About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.