Sr. Staff Validation Engineer

Job Title

Sr. Staff Validation Engineer

Role Summary

Hands-on validation engineer responsible for silicon bring-up, lab validation, systematic debug, and characterization of ASIC/SoC products integrating CXL 3.x, HBM, DDR, PCIe and high-speed SerDes. Works with design, firmware, DFT and test teams to drive issues to root cause, develop repeatable test content and automation, and improve lab infrastructure and processes.

Experience Level

Senior - typical experience ranges: 5–10 years with a Bachelor’s degree, or 3–5 years with a Master’s/PhD. Minimum practical validation experience: 3+ years in silicon or system validation or hardware test.

Responsibilities

Deliver lab validation and measurement data, maintain test infrastructure, and support debug and characterization.

• Execute silicon bring-up and validation plans for products with CXL, HBM, DDR, PCIe and SerDes interfaces.
• Set up and maintain lab test environments: boards, power, clocks, resets, cabling, and environmental controls to ensure repeatable measurements.
• Operate lab instruments: oscilloscopes, logic analyzers, protocol analyzers, pattern generators, BERTs, power supplies, and chambers.
• Develop and maintain lab automation and data collection scripts (Python, TCL, shell, MATLAB or similar).
• Run experiments to characterize link and memory behavior (throughput, latency, BER/margins, power) and summarize results for stakeholders.
• Debug issues across silicon, firmware, board and test setup; capture logs, traces and measurement data to drive root-cause analysis.
• Document test procedures, lab setups and results; communicate status and findings to validation leads and cross-functional teams.
• Provide feedback to improve test plans, lab infrastructure and validation processes; mentor junior engineers on lab best practices and debug methodology.

Requirements

Must-have skills and experience for successful execution of the role.

• 3+ years of silicon or system validation, hardware test, or lab-based engineering experience.
• Working knowledge of high-speed interfaces and memory subsystems (PCIe, CXL, DDR, HBM, SerDes concepts).
• Hands-on experience with lab instruments (oscilloscopes, logic analyzers, protocol analyzers, power supplies, pattern generators, BERTs).
• Experience with at least one scripting language used for lab automation and analysis (Python, TCL, shell, MATLAB or similar).
• Strong problem-solving skills and attention to detail in executing tests and recording results.

Nice-to-have:

• Experience validating high-speed digital interfaces and memory subsystems (PCIe, CXL, DDR, HBM, SerDes links).
• Exposure to first-silicon bring-up or early hardware prototyping.
• Familiarity with version control and issue-tracking tools used in engineering teams.

Education Requirements

Bachelor’s degree in Computer Science, Electrical Engineering or a related field with ~5–10 years of relevant experience, or a Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with ~3–5 years of relevant experience.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.