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Sr. Staff Thermo-Mechanical Engineer

Lightmatter
August 27, 2026
Full-time
On-site
Mountain View, California, United States
$169,000 - $244,000 USD yearly
Other Semiconductor Jobs, Level - Senior

Job Title

Sr. Staff Thermo-Mechanical Engineer

Role Summary

Lead thermo-mechanical analysis and validation for advanced photonic packaging used in AI data-center products. Work within the packaging organization to define design, material, and process solutions that meet thermal, optical, assembly, and reliability requirements.

Deliver simulation models, characterization plans, and documentation that enable robust package designs and support product development at scale.

Experience Level

Senior — staff-level role. Title indicates senior/staff responsibility; explicit years of experience not specified.

Responsibilities

Provide technical leadership for thermo-mechanical simulation and validation across packaging projects.

  • Act as technical authority for thermo-mechanical simulation standards, model fidelity, validation methodology, and documentation.
  • Identify simulation, characterization, and material-database gaps and lead investigations to close them.
  • Develop finite-element models for stress, warpage, and assembly processes at wafer and unit levels; assess design, process, and material impacts on failure modes and yield.
  • Perform reliability risk analysis under product use conditions and drive design/material mitigations.
  • Run multi-physics simulations including solder collapse, thermal-structural coupling, and packaging stress analyses to meet thermal, electrical, and optical requirements.
  • Create analytical or semi-empirical models for rapid assessment of new concepts.
  • Plan and execute characterization and validation via lab prototyping and vendor experiments to close the loop between models and hardware.
  • Develop automation frameworks (Python/MATLAB) to scale simulation throughput and improve repeatability.
  • Summarize and communicate findings to stakeholders and produce technical reports and methodology documentation.

Requirements

Must-have technical skills and experience; preferred items listed after.

  • Deep expertise in finite element analysis using commercial tools (Ansys, Abaqus, or equivalent) and demonstrated model validation for multi-material assemblies.
  • Hands-on multi-physics simulation experience: thermal-structural coupling, solder joint fatigue modeling, and warpage analysis.
  • Strong understanding of semiconductor packaging failure modes: solder fatigue, delamination, CTE-mismatch stress, underfill cracking under thermal cycling.
  • Experience with wafer-level and unit-level assembly processes: flip-chip, BGA, and advanced 3D packaging architectures.
  • Proficiency in Python and/or MATLAB for simulation automation and data analysis.
  • Experience developing analytical or semi-empirical models for first-order engineering assessments.
  • Experience driving characterization and validation programs through internal prototyping and external vendor collaboration.
  • Ability to document simulation methods and present technical results to cross-functional teams.
  • Ability to comply with U.S. export control requirements relevant to the role.

Preferred / nice-to-have:

  • Experience with photonic packaging: silicon photonics, co-packaged optics, fiber attach, or heterogeneous laser integration.
  • Familiarity with optical packaging reliability and the effect of thermo-mechanical performance on optical alignment stability.
  • Experience with statistical analysis and DOE tools (e.g., JMP).
  • Proven technical writing skills and ability to manage multiple projects independently.

Education Requirements

MS or PhD in Mechanical Engineering, Materials Science, or a related engineering field.


About the Company

Company: Lightmatter

Headquarters: Boston, Massachusetts, USA

Lightmatter develops photonic AI data-center infrastructure and optical chips for extreme-scale AI and HPC. The company invented the Passage 3D‑stacked photonics engine to provide high-bandwidth, low-latency interconnects across large-scale processors and raised $400M in Series D financing at a reported $4.4B valuation.

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Date Posted: 2026-08-26