Job Title
Sr Staff/Staff/Senior Engineer–SoC Design Verification
Role Summary
The SoC Verification engineer is responsible for various verification tasks including Test Plan creation, Testcase creation, Coverage closure, Requirements traceability, and Gate Level Simulation. The engineer collaborates with multiple teams to ensure product quality and reliability.
Experience Level
Mid-level; 5-12 years of experience in SoC Verification domains.
Responsibilities
Key responsibilities include:
- Drive verification technical execution and methodologies for microcontrollers and microprocessors.
- Collaborate with system architects to validate high-level specifications.
- Work with EDA vendors on deploying next-generation tools.
- Foster collaboration with R&D teams to meet project milestones.
- Develop detailed SoC verification execution plans and manage technical risks.
- Ensure SoC verification quality sign-offs and deliverables.
- Promote innovations in verification methodologies to enhance efficiency and quality.
Requirements
Qualifications include:
- Bachelor’s or master’s degree in electronics engineering.
- 5-12 years of experience in SoC Verification.
- Knowledge of EDA toolkits and Microcontroller/Microprocessor architecture.
- Proficient in Verilog, System Verilog, C/C++, Shell.
- Experience in testbench design using UVM methodology.
- Excellent written and verbal communication skills.
- Experience with debugging designs in simulation and on the bench.
Education Requirements
Bachelor’s or master’s degree in electronics engineering.
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

Date Posted: 2026-03-11