Sr. Staff Engineer – IO Design

Job Title

Sr. Staff Engineer – IO Design

Role Summary

Senior engineering role responsible for I/O and interface design for automotive and industrial SoC/IP products. The role covers interface architecture, implementation, verification, and cross-discipline integration with SoC, board, and customer teams.

Deliver optimized, verifiable I/O solutions that meet performance, timing, signal integrity and reliability targets.

Experience Level

Senior — requires a minimum of 7+ years of relevant experience in I/O/interface design and layout, including advanced technology nodes.

Responsibilities

Primary responsibilities include design, verification, and support of I/O interfaces across SoC projects and customer engagements.

• Design I/O and interface blocks for automotive and industrial CPU/IP/SoC products supporting protocols such as GPIO, I2C/I3C, DDR, CAN, Ethernet, LVDS, MIPI, USB, PCIe, etc.
• Define interface requirements, timing budgets, signal integrity and power constraints; run simulations and sign-off flows for I/O designs, including ESD and reliability checks.
• Collaborate with SoC, board/system design teams and customers to integrate I/O at physical, logical and test levels; provide first-level technical support and debugging.
• Contribute to interface specifications, datasheets and reference manuals for IP and SoC integrations.
• Participate in roadmap and innovation activities; drive automation and best practices to ensure high-quality, on-time deliverables.
• Support post-silicon validation and characterization; document bring-up procedures and validation reports and present findings to leadership when required.
• Support customer and partner technical queries related to I/O interfaces and integration.
• Maintain execution rigor, documentation quality and compliance with Environmental, Health, Safety & Security requirements.

Requirements

Must-have technical skills and experience for successful performance in the role. Preferred items are listed separately.

• Minimum 7+ years experience in I/O/interface design and layout for semiconductor IP/SoC in advanced process nodes.
• Deep knowledge of interface standards and both high-speed and low-speed, low-power I/O design; experience with ESD and high-voltage design.
• Practical experience with signal and power integrity trade-offs, package/PCB co-design considerations, and firmware interaction with I/O subsystems.
• Hands-on ability to run simulations and verification flows using industry EDA tools (examples: Cadence, Synopsys, Keysight, Ansys) and familiarity with lab equipment for debugging.
• Strong analytical, debugging, communication and documentation skills; able to produce clear architecture and requirements documents.
• Proven ability to work collaboratively in global, cross-disciplinary teams and interact directly with customers and partners.

Nice-to-have / Preferred:

• Experience applying ISO 26262 or IEC 61508 in semiconductor IP/SoC development.
• Contributions to interface or board standards (JEDEC, MIPI, SGET, etc.).

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

About the Company

Company: GlobalFoundries

Headquarters: Saratoga Springs, New York, USA

GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.