Sr. Staff Engineer, ASIC Verification - AI/HPC SoCs

Job Title

Sr. Staff Engineer, ASIC Verification - AI/HPC SoCs

Role Summary

Senior verification engineer on the Custom Silicon Engineering team within Data Center Engineering. Responsible for functional verification of memory, AI/HPC and die‑to‑die subsystems for advanced SoCs and IPs across AI/ML, compute and networking domains.

The role contributes to verification architecture, develops test strategies and testplans, implements tests and reference models, debugs failures, and drives verification methodology improvements.

Experience Level

Senior (Sr. Staff). Typical expectation: 8+ years of design/verification experience; at least 5 years of hands‑on verification on protocols or accelerators (PCIe, NOC, DDR, HBM, processor cores, AI/HPC accelerators) in block, subsystem and full‑chip contexts.

Responsibilities

Primary responsibilities include designing and executing verification environments and testplans for complex SoC subsystems.

• Verify memory, AI/HPC and die‑to‑die subsystems for SoCs and IPs across AI/ML, compute and networking products.
• Define and implement verification environment architecture, including reference models, bus‑functional monitors, and drivers using SystemVerilog and UVM.
• Develop test strategies and detailed verification testplans; write randomized tests and perform coverage analysis.
• Debug functional failures, collaborate with designers to identify root causes and implement fixes.
• Contribute to verification methodology, tools, regression infrastructure, and future direction of SoC verification environments.

Requirements

Must-have technical skills and experience.

• 8+ years of design engineering experience with a focus on verification.
• Minimum 5 years of direct hands‑on verification experience on PCIe, NOC, DDR, HBM, processor cores, or AI/HPC accelerators at block, subsystem and full‑chip levels.
• Proven experience developing complex/random verification environments using SystemVerilog and UVM.
• Experience writing and executing detailed verification testplans and coverage‑driven verification.
• Strong scripting skills (Python or Perl) and experience with EDA verification tools, bug tracking and regression frameworks.
• Solid object‑oriented design and implementation skills.
• Strong analytical, problem‑solving and communication skills; ability to multi‑task in a fast‑paced environment.
• Nice-to-have: prior work on memory subsystems, AI/HPC accelerators, or SoC verification methodology leadership.

Education Requirements

Posting specifies a Bachelor's degree in Electrical Engineering, Electronics, Computer Engineering or related field (typically with 10+ years' experience), or a Master's/PhD in those fields (typically with 8+ years' experience). Fields mentioned: Electrical engineering, Electronics, Computer engineering or related technical fields.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.