Sr. Staff ASIC Design Engineer

Job Title

Sr. Staff ASIC Design Engineer

Role Summary

As a senior member of the ASIC team, you will define microarchitecture and implement RTL for high-performance AI inference ASICs, integrating accelerators, CPUs, interconnects and third-party IP. You will work across architecture, verification, physical design and lab bring-up to deliver silicon-quality designs.

Experience Level

Senior — requires 10+ years of ASIC design experience as stated in the posting.

Responsibilities

Key responsibilities include:

• Author microarchitecture specifications and participate in specification and test plan reviews.
• Architect and implement complex RTL designs.
• Define third-party IP requirements and manage vendor selection.
• Integrate CPU and other relevant IP into the SoC CPU subsystem.
• Collaborate with physical design to resolve implementation and timing issues and optimize power.
• Analyze code coverage and provide feedback to verification to achieve coverage closure.
• Perform diagnostic and post-silicon validation tests and assist with software bring-up in the lab.

Requirements

Must-have skills and experience:

• 10+ years of ASIC design experience with RTL logic design in multi-million gate ASICs using Verilog or SystemVerilog.
• Proven IP integration experience, specifically integrating CPU IP into SoCs.
• Knowledge of ARM, RISC-V or MIPS architectures; memory hierarchy; cache coherency; virtual memory; and multicore CPU operation.
• Familiarity with AMBA/APB/AXI protocols and common peripheral interfaces (SPI, eMMC, MII, GPIO, I2C).
• Hands-on experience across ASIC front-end development tools and methodologies.
• Familiarity with low-power design flows, including UPF for multiple power domains.
• Ability to work independently in a fast-paced startup environment; strong troubleshooting and collaboration skills.

Nice-to-have:

• Experience with timing closure at high frequencies.
• Interest or experience in AI accelerator architectures (convolution, transformer and related workloads).

Education Requirements

B.S. in Electrical or Computer Engineering required; M.S. preferred.

About the Company

Company: Tensordyne

Tensordyne is a startup developing high-performance, low-power AI inference processors and multi-chip systems for generative AI acceleration in data centers. The company focuses on ASIC design, verification, and integration of computational accelerators with third-party SoC IP.