Sr SoC Integration Engineer

Role Summary

As a member of the SoC Physical Integration team, you'll interface with various engineering groups, including architecture, design, CAD, software, and product engineering, across various geographies to work towards the physical/electrical verification and tape out of AMD SoC FPGA/ACAP devices.

Experience Level

This role requires a basic understanding of FPGA architecture and related experience.

Responsibilities

• Defining and developing flows and methodologies for chip level integration.
• Developing tools for design verification or efficiency.
• Designing (RTL and custom), verifying, and integrating FPGA/ACAP sub-blocks.
• Coordinating activities between different design groups to ensure smooth integration.
• Executing chip level physical verification.
• Executing chip level electrical verification.

Requirements

• Knowledge of and/or experience with design and verification tools such as Virtuoso and Calibre.
• Knowledge of and/or experience with Place and Route (P&R) tools.
• Fundamental circuit design knowledge including simulation experience with Spice and Verilog.
• Strong debug skills.
• Scripting experience using Perl, Python, TCL, C-shell, Make and/or other scripting languages.
• Knowledge and experience with basic Unix data management and job control.
• Excellent written and oral communication skills.

Education Requirements

BS or MS in Electrical Engineering with FPGA working experiences.