Skip to main content
Cadence Design Systems logo

Sr Principal Software Engineer - Innovus (Physical Synthesis & Optimization)

Cadence Design Systems
October 2, 2026
Full-time
On-site
San Jose, California, United States
$161,000 - $299,000 USD yearly
EDA Jobs, Level - Senior

Job Title

Sr Principal Software Engineer - Innovus (Physical Synthesis & Optimization)

Role Summary

Develop and optimize high-performance C++ engines and algorithms for next-generation physical synthesis and optimization within the Innovus R&D team. Work addresses timing, power, performance, area (PPA), congestion, and scalability for large-scale semiconductor designs.

This is a hands-on engineering role focused on algorithm design, performance tuning, and scalable parallel/distributed implementations for production EDA tools.

Experience Level

Senior-level (principal/staff engineering level). Years of experience not specified.

Responsibilities

Primary responsibilities center on developing production-quality implementation engines and scaling them for semiconductor-scale workloads.

  • Design, implement, unit-test, and optimize high-performance C++ engines for physical synthesis, placement, and timing-driven optimization.
  • Develop advanced graph algorithms, spatial data structures, and continuous/combinatorial optimization methods for large-scale layouts and netlists.
  • Profile and eliminate CPU, memory, and scaling bottlenecks in production C++ codebases.
  • Implement multi-threaded and distributed algorithms to scale workloads across multi-core systems and compute clusters.
  • Integrate data-driven and AI-assisted heuristics into core synthesis and optimization flows.
  • Collaborate with R&D teams to translate research concepts into maintainable production software.

Requirements

Must-have technical skills and experience for immediate contribution.

  • Strong hands-on experience developing high-performance, production-quality C++ (C++17/20) on Linux.
  • Solid fundamentals in data structures, graph algorithms, computational geometry, memory management, and software architecture.
  • Practical multithreaded/concurrent programming experience and low-level performance profiling skills.
  • Proven ability to analyze, debug, and optimize complex algorithmic bottlenecks in large-scale software systems.
  • Experience building maintainable, production-grade software and writing unit tests.

Nice-to-have

  • Prior EDA or physical-design tool development (physical synthesis, placement, STA, routing, or timing closure).
  • Experience applying machine learning or data-driven heuristics to optimization problems.
  • Familiarity with Python, Tcl, or shell scripting for tooling and automation.
  • Exposure to SIMD/vectorization, GPU/CUDA acceleration, or large-scale distributed compute frameworks.

Education Requirements

Master's or Ph.D. in Computer Science, Electrical Engineering, Computer Engineering, or a related quantitative field - or equivalent hands-on industry experience.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

Cadence Design Systems logo

Date Posted: 2026-09-30