Sr. Principal Digital Design Verification Lead

Job Title

Sr. Principal Digital Design Verification Lead

Role Summary

Lead the development and execution of verification strategies for complex FPGA-based designs supporting the Core Vehicle Management Systems (CVMS) team in San Diego. Responsible for delivering robust simulation environments, testbenches, and verification flows to ensure functional correctness and performance of FPGA implementations.

Hybrid role; selected candidate must live within a commutable distance to the San Diego site. Travel ~10% may be required. Relocation assistance may be available.

Experience Level

Senior — typical qualification: Bachelor’s degree plus ~8 years relevant experience, or Master’s degree plus ~6 years. Expect 5+ years specifically in FPGA verification.

Responsibilities

Primary responsibilities include designing and executing verification activities for FPGA/RTL designs and supporting hardware bring-up.

• Develop and maintain comprehensive SystemVerilog-based verification environments (UVM preferred).
• Create reusable, scalable testbenches for functional and performance verification.
• Execute simulation-based verification using Questa/ModelSim and analyze simulation results.
• Develop directed and constrained-random test cases to achieve high functional coverage.
• Define, collect, and track coverage metrics (functional, code, toggle, assertions).
• Debug failures, collaborate with design engineers, and recommend design or test changes.
• Support regression automation and continuous integration workflows.
• Participate in design reviews and provide verification-focused feedback.
• Assist in hardware validation and bring-up when required.

Requirements

Must-have technical skills and security eligibility. Preferred items listed separately.

• Must-have: 5+ years of FPGA verification experience.
• Strong proficiency in SystemVerilog and modern verification methodologies; UVM strongly preferred.
• Hands-on experience with Questa and/or ModelSim.
• Solid understanding of digital logic design, RTL (Verilog/VHDL), and FPGA architectures.
• Experience writing testbenches, assertions (SVA), and coverage models.
• Familiarity with scripting for automation (Python, Tcl, Bash) and version control (Git).
• Ability to obtain and maintain US Government Secret Clearance and Program Access.
• Experience with regression automation and CI systems.
• Nice-to-have / Preferred: digital circuit design and schematic-level simulation experience; hands-on prototyping and debug of complex digital subsystems (FPGA, embedded processors, high-speed interfaces); prior use of OVM/UVM methodologies; ability to translate system specifications into hardware and test specifications.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or another STEM field plus 8 years of relevant experience, OR Master's degree in Electrical Engineering, Computer Engineering, or another STEM field plus 6 years of relevant experience, as specified in the posting.

About the Company

Company: Northrop Grumman

Headquarters: Falls Church, Virginia, United States

Northrop Grumman is a leading global aerospace and defense technology company that provides innovative solutions in mission systems, electronics, and software. With a legacy of significant advancements in technology, we empower employees to tackle complex challenges and create revolutionary systems that enhance global security. Our diverse teams focus on engineering innovation and product development, delivering solutions that support military and civilian customers worldwide.