Sr Principal Application Engineer - Emulation

Job Title

Sr Principal Application Engineer - Emulation

Role Summary

Develop customer-specific emulation and prototyping solutions, including advanced acceleration component development, methodology support, and operation/maintenance of emulation and prototyping platforms.

Support technical evaluations and benchmark development for Cadence emulation and prototyping platforms (Palladium, Protium), and create and deliver technical presentations and product demonstrations to customers and internal teams.

Experience Level

Senior — requires 5+ years of industry experience.

Responsibilities

Primary responsibilities include technical leadership for customers and internal teams, solution development, and product support.

• Establish technical credibility with customers and serve as primary technical contact.
• Provide in-depth technical assistance in collaboration with R&D to support advanced verification flows and secure design wins.
• Develop advanced acceleration components, methodology support, and operate/maintain emulation and prototyping tools and services.
• Lead technical evaluations and benchmark development for emulation and prototyping platforms.
• Create and present technical demonstrations, application notes, and technical articles.
• Collaborate with R&D and marketing to design competitive technical solutions.
• Review product proposals and device specifications; assume technical leadership roles as needed.

Requirements

Must-have technical skills and experience; preferred items listed as nice-to-have.

• Must-have: Strong RTL and testbench debug skills.
• Must-have: Experience with synthesizable coding style.
• Must-have: Experience scripting in Perl, Python, or TCL.
• Must-have: Strong software, HDL design, and verification skills.
• Must-have: Experience with SystemVerilog, VHDL, Verilog, and C/C++/SystemC.
• Must-have: Ability to quickly analyze verification environments and design complexity.
• Must-have: Strong verbal and written communication and teamwork; ability to interact effectively with customers and R&D teams.
• Must-have: 5+ years industry experience.
• Nice-to-have: Experience in HW acceleration, in-circuit emulation, or FPGA prototyping.
• Nice-to-have: Experience with multiple clock domains, asynchronous interfaces, and FPGA tool flow (Xilinx and/or Altera).
• Nice-to-have: Hands-on lab bring-up, debug, chipscope, and instrument usage.
• Nice-to-have: SoC architecture knowledge; embedded software development and HW/SW co-design/co-verification.
• Nice-to-have: Familiarity with protocols such as JTAG, UART, PCIe, AMBA, DDR, CHI and design fundamentals (architecture, micro-architecture, synthesis, timing).

Education Requirements

MS or PhD in Computer Science, Engineering, or a related technical field.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.