Sr. Mixed Signal Design Verification Manager

Job Title

Sr. Mixed Signal Design Verification Manager

Role Summary

Manage and grow a team of verification engineers in Qorvo's Power Management division, driving verification strategy and execution for mixed-signal and power-management ICs (motor drivers, power-loss protection, point-of-load, battery management).

Focus on metric-driven verification plans, UVM-based test development, simulation/modeling, and cross-team collaboration to ensure first-pass silicon success.

Experience Level

Senior — management role. The posting specifies approximately 13+ years of AMS design or verification experience and prior experience managing or leading a functional team.

Responsibilities

Lead verification activities and team development; deliver verification quality for power-management ICs.

• Manage and grow a verification team spanning entry-level to principal engineers.
• Define technical direction and verification strategy for mixed-signal ICs.
• Serve as customer-facing verification lead for catalog and custom PMICs and related products.
• Develop and execute metric-driven verification plans based on functional, performance, and test specifications focused on customer use-cases.
• Develop constrained-random tests and automated checkers within a UVM environment.
• Create accurate RNM or Verilog-AMS models to support transistor-level simulation and top-level simulation.
• Collaborate with design, test, and validation teams to debug issues and ensure first-pass testability.
• Continuously improve verification methodologies and automate verification tasks where applicable.

Requirements

Must-have:

• 13+ years of AMS design or verification experience for analog and power-management ICs.
• Experience managing teams or serving as a functional team lead.
• Hands-on experience with UVM and mixed-signal verification methodologies.
• Strong analog and digital design fundamentals and system-level knowledge of PMICs.
• Expertise with SPICE/Spectre and event-based simulators; experience with co-simulation and simulation/silicon debug.
• Strong problem-solving, debugging, communication, and collaboration skills.

Nice-to-have:

• Top-down design methodology experience.
• Shell or Python scripting proficiency.
• Familiarity with SV-UDN/EENET modeling techniques and SV assertions/functional coverage.
• Experience with GUI and command-line simulation flows.
• Understanding of integrating AI into verification workflows.
• Willingness to travel up to about 10% domestically or internationally.

Education Requirements

Master's degree in Electrical Engineering or a related field (mixed-signal / analog / power-management focus) is specified as required.

About the Company

Company: Qorvo

Headquarters: Greensboro, NC, US

Qorvo supplies innovative semiconductor solutions that enhance connectivity and power for a variety of applications, including consumer electronics, automotive, and healthcare. With a focus on RF and power solutions, Qorvo combines technology leadership and global manufacturing to address complex challenges in fast-growing industries. Their commitment to excellence and innovation drives them to shape the future of wireless communications.