Sr. Manager / Deputy Director, Quantum Cryo CMOS Design Enablement

Job Title

Sr. Manager / Deputy Director, Quantum Cryo CMOS Design Enablement

Role Summary

Lead technical and organizational efforts to establish cryogenic CMOS design enablement capability for quantum technologies. Responsible for PDK and model development, cryogenic characterization infrastructure, and coordination with device, process, EDA partners, and customers.

Manage a multidisciplinary team to deliver production-ready design flows, validated models, and test infrastructure aligned with program and customer requirements.

Experience Level

Senior-level. Posting specifies 12 years of relevant experience.

Responsibilities

Own and execute the cryogenic CMOS design enablement roadmap and lead the team delivering PDKs, models, and test capabilities.

• Define and lead PDK and compact/variability model development, parameter extraction, and validation.
• Build, lead, and develop a team spanning device modeling, test, characterization, and design enablement engineering.
• Establish cryogenic test lab capabilities, measurement techniques, and data pipelines for model development and validation.
• Define electrical characterization methodologies and test structures; correlate measurements to silicon data.
• Oversee test chip design, execution, and iteration to improve models and design rules.
• Partner with EDA vendors to deploy required simulation and design-flow capabilities.
• Coordinate cross-functional execution across device engineering, process development, integration, and customers.
• Set technical milestones, success criteria, and communicate progress, risks, and mitigation plans to leadership.
• Serve as a senior technical interface with customers, partners, research institutions, and external programs.

Requirements

Key must-have skills and experience; preferred items listed separately.

• Minimum 12 years of relevant industry experience in device modeling, design enablement, or semiconductor characterization.
• Proven leadership experience building and managing multidisciplinary engineering teams.
• Experience developing PDKs, compact models, variability/statistical models, and model validation workflows.
• Experience with test chip definition and correlation of measurements to models.
• Experience engaging with EDA vendors and integrating tools into design flows.
• Willingness to travel up to 15%.

Nice-to-have:

• Experience with cryogenic electronics, low-temperature device physics, or quantum hardware.
• Experience building or scaling test labs and measurement infrastructure.
• Experience with government, academic, or industry research collaborations and mentoring senior engineers.

Education Requirements

MS or PhD in Electrical Engineering, Physics, Applied Physics, or a related technical field (specified in posting).

About the Company

Company: GlobalFoundries

Headquarters: Saratoga Springs, New York, USA

GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.