Sr. Logic Design Engineer
Senior logic design engineer on Intel's HIPD team responsible for UCIE PHY IP used in datacenter/server products. The role focuses on RTL/logic design, microarchitecture participation, RTL verification support, and optimization for power, performance, area, and timing to prepare blocks for physical implementation.
Senior β typical qualification: Bachelor's degree +4 years relevant experience, Master's degree +2 years, or PhD +1 year of relevant experience.
Primary responsibilities include design, verification support, and quality assurance of logic IP blocks.
Must-have technical skills and experience. Education-related requirements are summarized under Education Requirements below.
Nice-to-have
Minimum qualification options: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field plus 4+ years' relevant experience; OR Master's degree in Electrical or Computer Engineering or a related field plus 2+ years' experience; OR PhD in Electrical or Computer Engineering or a related field plus 1+ year experience. The posting allows equivalent combinations of industry experience, internships, coursework, or research in place of formal education where applicable.
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
