Sort Interface Pathfinding and Development Engineer

Job Title

Sort Interface Pathfinding and Development Engineer

Role Summary

Responsible for pathfinding, development, and qualification of probing and sort interface hardware and processes for wafer and die sort in advanced packaging platforms (EMIB, Foveros, etc.). Works with internal product teams, external foundry/OSAT customers, and suppliers to deliver production-ready probe and sort solutions that meet testability and NPI timelines.

Experience Level

Mid-level. Experience expectations vary by degree: typically multiple years of relevant industry experience (examples: 6+ years with a BS, 4+ with an MS, or 2+ post-graduate years with a PhD).

Responsibilities

Lead technical and execution activities to deliver probe and sort interface solutions from pathfinding through supplier qualification and production readiness.

• Design and execute Design of Experiments (DOE) to optimize and qualify probing technologies and contact architectures for wafer and die sort.
• Serve as technical liaison for foundry and OSAT customers; translate chiplet/package requirements into scalable sort interface specifications.
• Author sort design rules and Interface Design Kits (IDKs) to support ecosystem integration.
• Collaborate with customer design and DFT teams to architect test interface hardware and resolve technical gaps.
• Partner with test-solution vendors and PCB/substrate suppliers to develop probing capabilities.
• Direct supplier pathfinding, align vendor roadmaps, and ensure supplier accountability for NPI hardware delivery.

Requirements

Core technical skills and domain experience required for initial consideration.

• Hands-on experience with wafer/die sort technology, prober-tester cell integration, and probe card qualification.
• Proven ability to structure and execute DOEs to evaluate probing margins, yield, and process health.
• Experience with ATE test hardware, test methodology, or sort/class product development and PCB/space-transformer/substrate design/stackup.
• Track record managing technical relationships with external probe card/substrate suppliers and coordinating with OSAT/foundry partners.
• Supplier management and manufacturing-readiness experience to meet NPI schedules and delivery targets.
• Strong communication skills for cross-functional collaboration with customers and global teams.

Nice-to-have:

• Experience qualifying probe technologies for fine-pitch micro-bumps, 2.5D/3D architectures (EMIB, EMIB-T, silicon bridges), or wafer-level chip-scale probing.
• Hands-on experience with commercial ATE platforms (e.g., Advantest V93k, Teradyne Ultra-FLEX).
• Familiarity with multi-client test cell standards, PDK/PDL enablement, or turnkey test delivery models.

Education Requirements

Degree requirements: Bachelor's in Electrical Engineering, Mechanical Engineering, Materials Science, or a related STEM field with 6+ years industry experience; OR Master's in those fields with 4+ years industry experience; OR Ph.D. in those fields with 2+ years relevant post-graduate or industry experience. Fields listed include electrical, mechanical, materials, and related STEM disciplines.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.