Solutions Engineering Architect

Job Title

Solutions Engineering Architect

Role Summary

Work directly with customer SoC architects and engineering teams to define and deliver subsystem architectures that integrate Synopsys IP (UCIe, PCIe, Ethernet, HBM, LPDDR) into high-performance AI and HPC chips. Act as the technical lead through evaluation, integration, tape-out, and silicon bring-up, and feed customer requirements back into IP roadmaps.

This role combines hands-on lab and board-level debugging with customer-facing architecture work and cross-functional influence across product management, design engineering, and field teams.

Experience Level

Senior level - requires approximately 10 or more years of hands-on experience in SoC/ASIC design, system architecture, or applications engineering on complex SoC projects.

Responsibilities

Primary responsibilities include:

• Engage with customer architects and SoC leads to gather system requirements and translate them into IP integration solutions.
• Architect subsystems that integrate Synopsys IP (UCIe, PCIe, Ethernet, HBM, LPDDR), specifying interfaces, performance targets, and implementation strategies.
• Own the technical lifecycle from IP evaluation through integration, tape-out, and silicon bring-up; act as the technical escalation point for customers.
• Produce technical collateral: architecture diagrams, design specifications, application notes, and white papers to support presales and customer implementation.
• Analyze customer requirements and market feedback; collaborate with Product Management and Design Engineering to influence IP roadmaps.
• Provide technical training to field application engineers and key customers on integration best practices and system-level considerations.
• Travel ~15–30% to customer sites, sales offices, and engineering centers for evaluations, design reviews, and escalations.

Requirements

Must-have:

• 10+ years of hands-on experience as a design engineer, system architect, or applications engineer on complex SoCs or ASIC projects.
• Deep working knowledge of interface, connectivity, and memory protocols: UCIe, PCIe, Ethernet, HBM, and LPDDR across multiple generations and use cases.
• Practical experience with RTL design and verification (Verilog/SystemVerilog), synthesis, static timing analysis, physical design flows, and testbench creation/simulation.
• Experience with high-speed PCB layout, signal integrity analysis, board assembly/manufacturing processes, and hands-on use of lab equipment (high-speed oscilloscopes, spectrum/logic analyzers, traffic generators).
• Prior experience selecting, integrating, designing, or supporting semiconductor IP in a customer-facing or internal architecture role.
• Proven ability to communicate complex technical concepts clearly in both verbal and written formats.

Nice-to-have:

• Experience influencing product roadmaps and working closely with product management and design engineering on next-generation IP.
• Background across both board-level signal integrity and subsystem-level architecture for HPC/AI accelerators.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronic Engineering, Computer Engineering, or Computer Science.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.