Software Engineer II: Verification IP Development
Cadence Design SystemsRole Summary
The Software Engineer II will focus on Verification IP (VIP) development, managing multiple VIP projects while leading a small team and collaborating with customers. The role emphasizes technical expertise in protocol and formal verification methodologies.
Experience Level
Mid-level with candidate expected to have relevant experience in software development.
Responsibilities
The main responsibilities include:
- Design and develop Verification IP using C/C++.
- Manage multiple VIPs and lead a small team.
- Interact with customers effectively.
- Apply technical expertise in protocol and formal verification methodologies.
Requirements
Applicants must fulfill the following:
- Bachelor's degree in Electrical Engineering, Computer Science, or related field.
- Proficiency in functional verification using SV/UVM.
- Strong debugging skills and a foundation in Digital Electronics and Programming.
- Hands-on experience with C/C++ and scripting.
- Prior usage and development experience in VIP is advantageous.
- Excellent analytical and communication skills in English and Portuguese.
- Experience with MIPI is a plus.
Education Requirements
A Bachelor's degree in Electrical Engineering, Computer Science, or a related field is required.
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
