SoC Verification Engineer - NoC / UVM
Advanced Micro DevicesJob Title
SoC Verification Engineer - NoC / UVM
Role Summary
The verification team seeks an engineer to lead and contribute to verification of Network-on-Chip (NoC) IPs, subsystems and SoC designs. The role architects, develops, and uses simulation- and formal-based verification environments at block and subsystem levels to prove functional correctness.
The position partners with architects and design teams to plan verification, debug complex issues, and drive verification closure. This role is not eligible for visa sponsorship.
Experience Level
Mid-level. Specific years of experience not stated.
Responsibilities
Primary responsibilities include planning, implementing, and executing verification activities:
- Lead verification planning for complex digital blocks and subsystems based on architecture and specifications.
- Define comprehensive verification test plans with architects and design engineers.
- Design and architect SystemVerilog/UVM testbenches for efficient verification.
- Create and enhance constrained-random and directed verification environments; write and use SVA assertions for formal verification.
- Debug verification failures with design engineers and drive fixes to closure.
- Define and measure coverage metrics; perform coverage analysis and close verification holes.
Requirements
Essential technical skills and preferred qualifications.
-
Must-have:
- Strong expertise in SystemVerilog and UVM.
- Solid understanding of ASIC/SoC verification methodologies, including constraint-random and coverage-driven techniques.
- Experience with SystemVerilog Assertions (SVA) and formal verification concepts.
- Proven ability to debug complex designs and collaborate across global teams.
-
Nice-to-have:
- Experience with NoC architectures and block-level NoC verification.
- Familiarity with simulators/debug environments (Synopsys VCS, Cadence IES) and gate-level simulation.
- Experience with protocols such as AXI3/4, DDR4/5, HBM, PCIe, processors, or graphics.
- Experience with formal property checking tools (Cadence IEV, Jasper, Synopsys VC-Formal/Magellan), power/reset verification, contention checking, and verification management tools.
- Experience as a verification architect or establishing verification methodology/infrastructure is a plus.
Education Requirements
Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.
About the Company
Company: Advanced Micro Devices
Headquarters: Sunnyvale, California, USA
Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.
