SoC STA/Timing Engineer (Senior Staff/Principal)
QualcommJob Title
SoC STA/Timing Engineer (Senior Staff/Principal)
Role Summary
Lead STA/timing engineer responsible for setting up, converging, reviewing, and signing off timing for multi-mode, multi-voltage SoC and subsystem designs. The role drives timing methodology, flow automation, and cross-functional timing closure across design, CAD, synthesis, DFT and physical implementation teams.
Experience Level
Senior - requires substantial domain experience. The job text specifies 12–20 years of relevant experience is required.
Responsibilities
Primary responsibilities focus on static timing analysis, flow automation, and cross-team coordination to achieve signoff.
- Perform STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain SoC and subsystem designs.
- Validate and debug timing across PVT corners using tools such as PrimeTime and Tempus.
- Run STA flows, correlate Spice results to STA, and optimize flows for convergence.
- Develop and evaluate timing methodologies and tooling across technology nodes; automate STA/PD flows using TCL/Perl/Python.
- Handle ECO timing flows (DMSA, tweaker, PrimeClosure) and perform logical equivalence checks from RTL to netlist.
- Collaborate with design, DFT, synthesis, technology, CAD, and physical implementation teams to resolve timing issues.
- Apply low-power timing techniques including clock gating and power-gating across multi-voltage designs.
- Mentor junior engineers on timing flows and methodologies.
Requirements
Must-have technical skills and hands-on tool experience.
- Strong STA fundamentals, including AOCV/POCV concepts, CTS, and timing constraints.
- Hands-on experience with PrimeTime and/or Tempus for timing analysis.
- Familiarity with ASIC back-end flows such as ICC2 or Innovus.
- Knowledge of signal integrity, cross-talk noise, and parasitic extraction.
- Scripting proficiency in TCL, Perl, and Python for flow automation.
- Understanding of Spice simulations (Hspice, FineSim) and Monte Carlo analysis for correlation purposes.
Preferred / nice-to-have:
- Experience driving timing convergence at chip and hard-macro levels.
- Exposure to RTL-to-GDSII flows.
- Strong technical writing and cross-team communication skills.
Education Requirements
Minimum qualifications specify a degree plus relevant experience: Bachelor's in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 6+ years of hardware engineering experience; OR Master's in those fields with 5+ years; OR PhD in those fields with 4+ years of hardware engineering experience.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
