SOC Physical Design Engineer – Power, Timing
Lead and manage the physical design flow for high‑speed SoC products, focusing on floorplanning, timing analysis, and design verification. The role works within the physical design team and interfaces with RTL, verification, and system teams to ensure timing and power objectives are met.
Mid-level. The posting does not specify required years of experience.
The core responsibilities center on ownership of the physical design flow and ensuring timing and power targets are achieved for SoC designs.
Must-have technical skills and experience related to SoC physical design. Education details are listed separately under Education Requirements.
Master's or Bachelor's degree in Electrical Engineering or a related field. The posting also expects relevant experience in physical design processes.
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
