SoC Physical Design Engineer

Job Title

SoC Physical Design Engineer

Role Summary

Join a Devices Development Group team responsible for Server SoC physical implementation. The role focuses on taking RTL through to GDS, delivering manufacturable designs that meet performance, power, and reliability targets.

You will work with cross-functional teams and foundry/process partners, improve physical design methodologies, and provide technical leadership on complex implementation and signoff tasks.

Experience Level

Senior level. Typical guidance: Bachelor's degree +10 years of relevant experience, or Master's degree +8 years.

Responsibilities

Primary responsibilities include hands-on physical implementation, verification/signoff, and methodology development.

• Perform physical design implementation from RTL to GDS to produce a manufacturing-ready design database.
• Execute physical synthesis, floorplanning, placement, routing, and clock tree synthesis using industry tools (e.g., Synopsys, Cadence).
• Perform multi-power-domain analysis using standard power formats such as UPF or CPF.
• Lead verification and signoff flows: formal equivalence verification, static timing analysis, reliability verification, layout verification, noise analysis, and structural design checks.
• Analyze results and recommend design optimizations to resolve violations and improve architecture.
• Drive performance co-optimization with process teams and other stakeholders.
• Develop, improve, and automate physical design methodologies and flows.
• Provide technical consultation, collaborate cross-functionally, and offer technical leadership and mentoring to team members.

Requirements

Must-have skills and experience; followed by concise nice-to-have items.

• Must-have: Expertise in physical design tools and methodologies, including clock tree synthesis, static timing analysis, floorplanning, power and noise analysis, and RTL-to-GDS workflows.
• Must-have: Proficiency in scripting for automation (Python, Perl, TCL).
• Must-have: Experience with verification and signoff processes (equivalence verification, timing analysis, layout verification).
• Nice-to-have: Experience driving tool, flow, or methodology enhancements (power, FEV, etc.).
• Nice-to-have: Experience defining physical design methodologies and working with EDA/automation teams, vendors, and stakeholders.
• Nice-to-have: Strong problem-solving, attention to detail, and ability to work effectively in fast-paced teams.

Education Requirements

Bachelor's degree in Electronics, Computer Engineering, or a related field with 10+ years of experience; or Master's degree with 8+ years of experience. (No certifications or equivalent-experience language specified.)

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.