SoC Performance Verification R&D Engineer
SynopsysJob Title
SoC Performance Verification R&D Engineer
Role Summary
Engineer responsible for developing and deploying SoC performance verification solutions on Synopsys ZeBu emulation platforms. The role focuses on building transactors, protocol checkers, and automation to validate mobile, automotive, and AI SoC designs under realistic workloads.
Position sits on the Korea-based ZeBu Performance Verification team and requires direct collaboration with customers, local field engineers, and global R&D/product teams to deliver deployable verification solutions.
Experience Level
Senior - expects substantial experience; the posting specifies 10+ years of hands-on RTL design and RTL design verification experience.
Responsibilities
Primary responsibilities include building emulation-based performance verification environments, supporting customer deployments, and improving verification IP and automation for ZeBu platforms.
- Develop and deploy SoC performance verification solutions on ZeBu, including transactors, protocol checkers, and CI/CD automation.
- Implement emulation transactors for AMBA AXI, CHI, and custom SoC protocols using SystemVerilog and C++.
- Debug and optimize performance verification environments across cache controllers, LPDDR memory controllers, and system interconnects.
- Provide direct technical support and troubleshooting for customers deploying ZeBu, including emulation setup and transactor integration.
- Collaborate with product and R&D teams to define verification IP roadmaps and align solutions with customer needs.
- Lead technical discussions and design reviews with customers and internal teams; communicate trade-offs and drive decisions.
- Maintain and scale existing verification components to support evolving SoC architectures and protocol standards.
Requirements
Key technical skills and experience required or strongly preferred.
- Must-have: Deep understanding of SoC architecture, including cache controllers, AMBA system buses (AXI, CHI), and LPDDR memory controllers.
- Must-have: Proven experience developing emulation-based transactor models and verification solutions using SystemVerilog and C++.
- Must-have: Business-level English communication skills for leading technical meetings and writing clear documentation.
- Must-have: Familiarity with UNIX/Linux environments and scripting for automation (Python, Perl, or shell scripting).
- Must-have: Experience working directly with customers in technical support, field applications, or solutions engineering roles.
- Nice-to-have: Hands-on experience with ZeBu emulation platforms or similar hardware emulation/prototyping environments.
Education Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field. The posting specifies 10+ years of hands-on RTL design and RTL design verification experience.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
